Building Reservoir Computing Hardware Using Low Energy-Barrier Magnetics

TL;DR

This paper proposes a hardware implementation of reservoir computing using low energy-barrier magnet-based magnetic tunnel junctions, enabling compact and energy-efficient neural processing for edge devices.

Contribution

It introduces a novel analog stochastic neuron cell built from low energy-barrier magnets for reservoir computing hardware implementation.

Findings

Simulation results demonstrate effective reservoir computing performance.

Hardware design suggests potential for low-energy, compact neural processors.

Implementation aligns with mathematical models of reservoir computing.

Abstract

Biologically inspired recurrent neural networks, such as reservoir computers are of interest in designing spatio-temporal data processors from a hardware point of view due to the simple learning scheme and deep connections to Kalman filters. In this work we discuss using in-depth simulation studies a way to construct hardware reservoir computers using an analog stochastic neuron cell built from a low energy-barrier magnet based magnetic tunnel junction and a few transistors. This allows us to implement a physical embodiment of the mathematical model of reservoir computers. Compact implementation of reservoir computers using such devices may enable building compact, energy-efficient signal processors for standalone or in-situ machine cognition in edge devices.