On Actual Preparation of Dicke State on a Quantum Computer

TL;DR

This paper presents an optimized deterministic circuit for preparing Dicke states on quantum computers, reducing gate counts and architectural constraints, and demonstrating improved performance on IBM QX hardware.

Contribution

It introduces the most efficient Dicke State preparation circuit in terms of CNOT and single qubit gates, with analysis of error reduction and gate distribution strategies.

Findings

Reduced CNOT and single qubit gate counts compared to previous methods

Lower noise-induced errors observed on IBM QX hardware

Analysis of CNOT gate distribution impacts on error rates

Abstract

The exact number of CNOT and single qubit gates needed to implement a Quantum Algorithm in a given architecture is one of the central problems of Quantum Computation. In this work we study the importance of concise realizations of Partially defined Unitary Transformations for better circuit construction using the case study of Dicke State Preparation. The Dicke States $(\left|D^n_k \right>)$ are an important class of entangled states with uses in many branches of Quantum Information. In this regard we provide the most efficient Deterministic Dicke State Preparation Circuit in terms of CNOT and single qubit gate counts in comparison to existing literature. We further observe that our improvements also reduce architectural constraints of the circuits. We implement the circuit for preparing $\left| D^4_2 \right>$ on the "ibmqx2" machine of the IBM QX service and observe that the error induced due to noise in the system is lesser in comparison to the existing circuit descriptions. We conclude by describing the CNOT map of the generic $\left| D^n_k \right>$ preparation circuit and analyze different ways of distributing the CNOT gates in the circuit and its affect on the induced error.