FPnew: An Open-Source Multi-Format Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing
Stefan Mach, Fabian Schuiki, Florian Zaruba, Luca Benini

TL;DR
FPnew is an open-source, highly configurable transprecision floating-point unit supporting multiple formats, significantly improving energy efficiency and performance in RISC-V processors for mixed-precision applications.
Contribution
We introduce FPnew, a flexible open-source TP-FPU supporting diverse FP formats and extended ISA, demonstrating substantial energy and performance benefits in RISC-V cores.
Findings
Speedup of 1.67x over FP32 baseline in 32-bit core
37% reduction in system energy consumption
Leading energy efficiency up to 2.95 Tflop/sW in 64-bit core
Abstract
The slowdown of Moore's law and the power wall necessitates a shift towards finely tunable precision (a.k.a. transprecision) computing to reduce energy footprint. Hence, we need circuits capable of performing floating-point operations on a wide range of precisions with high energy-proportionality. We present FPnew, a highly configurable open-source transprecision floating-point unit (TP-FPU) capable of supporting a wide range of standard and custom FP formats. To demonstrate the flexibility and efficiency of FPnew in general-purpose processor architectures, we extend the RISC-V ISA with operations on half-precision, bfloat16, and an 8bit FP format, as well as SIMD vectors and multi-format operations. Integrated into a 32-bit RISC-V core, our TP-FPU can speed up execution of mixed-precision applications by 1.67x w.r.t. an FP32 baseline, while maintaining end-to-end precision and reducing…
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