Extension of the INFN Tier-1 on a HPC system
Tommaso Boccali, Stefano Dal Pra, Daniele Spiga, Diego Ciangottini,, Stefano Zani, Concezio Bozzi, Alessandro De Salvo, Andrea Valassi, Francesco, Noferini, Luca dell Agnello, Federico Stagni, Alessandra Doria, Daniele, Bonacorsi

TL;DR
This paper describes the development and initial results of integrating an HPC system with existing grid infrastructure at CNAF, enhancing compute capabilities for LHC experiments through a hybrid HTC+HPC approach.
Contribution
It presents a novel integration of HPC resources with the INFN Tier-1 infrastructure, addressing technical challenges and demonstrating a large-scale implementation with 30 million KNL core hours.
Findings
Successful deployment of an integrated HTC+HPC system on KNL processors.
Overcoming technical challenges related to low RAM nodes and environment restrictions.
Preliminary positive results from large-scale resource utilization.
Abstract
The INFN Tier-1 located at CNAF in Bologna (Italy) is a center of the WLCG e-Infrastructure, supporting the 4 major LHC collaborations and more than 30 other INFN-related experiments. After multiple tests towards elastic expansion of CNAF compute power via Cloud resources (provided by Azure, Aruba and in the framework of the HNSciCloud project), and building on the experience gained with the production quality extension of the Tier-1 farm on remote owned sites, the CNAF team, in collaboration with experts from the ALICE, ATLAS, CMS, and LHCb experiments, has been working to put in production a solution of an integrated HTC+HPC system with the PRACE CINECA center, located nearby Bologna. Such extension will be implemented on the Marconi A2 partition, equipped with Intel Knights Landing (KNL) processors. A number of technical challenges were faced and solved in order to successfully run…
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