Compiler Directed Speculative Intermittent Computation
Jongouk Choi, Qingrui Liu, Changhee Jung

TL;DR
CoSpec introduces a compiler-architecture co-design for energy-harvesting in-order processors that uses speculation and region partitioning to ensure crash consistency and improve performance during power outages.
Contribution
It proposes a novel speculative approach with region-based partitioning to achieve crash consistency without unconventional hardware support in energy-harvesting systems.
Findings
Achieves over 1.2X speedup in no-outage scenarios.
Outperforms state-of-the-art by 1.8~3X on energy harvesting traces.
Effectively manages power failures with region-based speculation.
Abstract
This paper presents CoSpec, a new architecture/compiler co-design scheme that works for commodity in-order processors used in energy-harvesting systems. To achieve crash consistency without requiring unconventional architectural support, CoSpec leverages speculation assuming that power failure is not going to occur and thus holds all committed stores in a store buffer (SB), as if they were speculative, in case of mispeculation. CoSpec compiler first partitions a given program into a series of recoverable code regions with the SB size in mind, so that no region overflows the SB. When the program control reaches the end of each region, the speculation turns out to be successful, thus releasing all the buffered stores of the region to NVM. If power failure occurs during the execution of a region, all its speculative stores disappear in the volatile SB, i.e., they never affect program…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Low-power high-performance VLSI design · Radiation Effects in Electronics
