Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness
Arjun Singh Chauhan, Vineet Sahula, Atanendu Sekhar Mandal

TL;DR
This paper introduces a novel FPGA-based ROPUF design that significantly enhances reliability and uniqueness by using a frequency profiling method for optimal ring oscillator placement, tested successfully on Xilinx-7 series FPGAs.
Contribution
The paper presents a new placement strategy for ring oscillators in FPGA-based ROPUFs that improves reliability and uniqueness with minimal area overhead.
Findings
Achieved up to 49.90% in uniqueness
Reliability improved to 99.70% with less than 1 bit flip
Passed all relevant NIST statistical tests
Abstract
The physical unclonable functions (PUF) are used to provide software as well as hardware security for the cyber-physical systems. They have been used for performing significant cryptography tasks such as generating keys, device authentication, securing against IP piracy, and to produce the root of trust as well. However, they lack in reliability metric. We present a novel approach for improving the reliability as well as the uniqueness of the field programmable gated arrays (FPGAs) based ring oscillator PUF and derive a random number, consuming very small area (< 1%) concerning look-up tables (LUTs). We use frequency profiling method for distributing frequency variations in ring oscillators (RO), spatially placed all across the FPGA floor. We are able to spot suitable locations for RO mapping, which leads to enhanced ROPUF reliability. We have evaluated the proposed methodology on…
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