A Survey on Split Manufacturing: Attacks, Defenses, and Challenges
Tiago D. Perez, Samuel Pagliarini

TL;DR
This survey reviews split manufacturing in IC design, detailing attack methods, defense strategies, and challenges, highlighting the security trade-offs and the need for improved evaluation techniques.
Contribution
It provides a comprehensive overview of attack and defense techniques in split manufacturing, clarifies existing discrepancies, and discusses future research challenges.
Findings
Attacks can often reconstruct BEOL connections with high accuracy.
Defense techniques vary in effectiveness, with no clear consensus.
Evaluating security improvements remains a fundamental challenge.
Abstract
In today's integrated circuit (IC) ecosystem, owning a foundry is not economically viable, and therefore most IC design houses are now working under a fabless business model. In order to overcome security concerns associated with the outsorcing of IC fabrication, the Split Manufacturing technique was proposed. In Split Manufacturing, the Front End of Line (FEOL) layers (transistors and lower metal layers) are fabricated at an untrusted high-end foundry, while the Back End of Line (BEOL) layers (higher metal layers) are manufactured at a trusted low-end foundry. This approach hides the BEOL connections from the untrusted foundry, thus preventing overproduction and piracy threats. However, many works demonstrate that BEOL connections can be derived by exploiting layout characteristics that are introduced by heuristics employed in typical floorplanning, placement, and routing algorithms.…
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