Design and Hardware Implementation of a Separable Image Steganographic Scheme Using Public-key Cryptosystem

TL;DR

This paper presents a hardware-based public-key steganographic cryptosystem using images as carriers, featuring a separable framework and efficient parallel processing, suitable for embedded and real-time applications.

Contribution

It introduces a novel hardware implementation of a separable public-key steganographic scheme using Paillier cryptography with a parallel Montgomery exponentiation core.

Findings

Efficient hardware implementation with reduced area and power consumption

High performance in embedding and extracting secret data

Suitable for embedded systems and real-time applications

Abstract

In this paper, a novel and efficient hardware implementation of steganographic cryptosystem based on a public-key cryptography is proposed. Digital images are utilized as carriers of secret data between sender and receiver parties in the communication channel. The proposed public-key cryptosystem offers a separable framework that allows to embed or extract secret data and encrypt or decrypt the carrier using the public-private key pair, independently. Paillier cryptographic system is adopted to encrypt and decrypt pixels of the digital image. To achieve efficiency, a proposed efficient parallel montgomery exponentiation core is designed and implemented for performing the underlying field operations in the Paillier cryptosystem. The hardware implementation results of the proposed steganographic cryptosystem show an efficiency in terms of area (resources), performance (speed) and power consumption. Our steganographic cryptosystem represents a small footprint making it well-suited for the embedded systems and real-time processing engines in applications such as medical scanning devices, autopilot cars and drones.