Quantum Divide and Compute: Hardware Demonstrations and Noisy Simulations

TL;DR

This paper demonstrates a novel method for breaking quantum circuits into smaller fragments to enable execution on noisy, intermediate-scale quantum computers, supported by experimental and simulated results showing improved success probabilities.

Contribution

It introduces and experimentally validates a circuit fragmentation technique that allows larger quantum circuits to be run on limited hardware, with noise modeling and simulation.

Findings

Fragmentation improves success probability over non-fragmented circuits.

Experimental results agree within 20% with noise simulations.

Recombining noisy fragments can outperform non-fragmented execution.

Abstract

Noisy, intermediate-scale quantum computers come with intrinsic limitations in terms of the number of qubits (circuit "width") and decoherence time (circuit "depth") they can have. Here, for the first time, we demonstrate a recently introduced method that breaks a circuit into smaller subcircuits or fragments, and thus makes it possible to run circuits that are either too wide or too deep for a given quantum processor. We investigate the behavior of the method on one of IBM's 20-qubit superconducting quantum processors with various numbers of qubits and fragments. We build noise models that capture decoherence, readout error, and gate imperfections for this particular processor. We then carry out noisy simulations of the method in order to account for the observed experimental results. We find an agreement within 20% between the experimental and the simulated success probabilities, and we observe that recombining noisy fragments yields overall results that can outperform the results without fragmentation.