Energy-Efficient On-Chip Networks through Profiled Hybrid Switching

TL;DR

This paper proposes a hybrid switching approach for on-chip networks that combines circuit switching with virtual channel flow control, significantly reducing energy consumption while maintaining competitive latency.

Contribution

It introduces a profiled hybrid switching method that uses circuit switching for part of the traffic to improve energy efficiency in networks-on-chip.

Findings

Energy per flit reduced by up to 32%.

Achieves competitive latency compared to traditional virtual channel flow control.

Demonstrates effective energy savings with minimal latency impact.

Abstract

Virtual channel flow control is the de facto choice for modern networks-on-chip to allow better utilization of the link bandwidth through buffering and packet switching, which are also the sources of large power footprint and long per-hop latency. On the other hand, bandwidth can be plentiful for parallel workloads under virtual channel flow control. Thus, dated but simpler flow controls such as circuit switching can be utilized to improve the energy efficiency of modern networks-on-chip. In this paper, we propose to utilize part of the link bandwidth under circuit switching so that part of the traffic can be transmitted bufferlessly without routing. Our evaluations reveal that this proposal leads to a reduction of energy per flit by up to 32% while also provides very competitive latency per flit when compared to networks under virtual channel flow control.