Comparing quaternary and binary multipliers

TL;DR

This paper compares binary and quaternary multipliers, showing that interfacing binary multipliers with decoders and encoders yields better performance than direct quaternary implementations due to complexity issues.

Contribution

It demonstrates that interfacing binary multipliers with conversion circuitry outperforms direct quaternary multipliers in terms of complexity and efficiency.

Findings

Interfaced binary multipliers outperform direct quaternary multipliers.

Complexity of quaternary digit multipliers exceeds that of binary counterparts.

No reduction in interconnects, chip area, or power with quaternary multipliers.

Abstract

We compare the implementation of a 8x8 bit multiplier with two different implementations of a 4x4 quaternary digit multiplier. Interfacing this binary multiplier with quaternary to binary decoders and binary to quaternary encoders leads to a 4x4 multiplier that outperforms the best direct implementation of a 4x4 quaternary multiplier. The far greater complexity of the 1-digit multipliers and 1-digit adders used in this direct implementation compared to the binary 1-bit multipliers and full adders cannot be compensated by the reduced count of quaternary operators. As the best quaternary multiplier includes the corresponding binary one, it means that there is no opportunity to get less interconnects, less chip area, less power dissipation with the quaternary multiplier.