Dim Silicon and the Case for Improved DVFS Policies
Mathias Gottschlag, Yussuf Khalil, Frank Bellosa

TL;DR
This paper analyzes Intel CPU frequency reduction policies caused by AVX instructions, highlighting their suboptimality and proposing classification-based hints to improve dynamic voltage and frequency scaling (DVFS) performance.
Contribution
It introduces a classification mechanism for applications to provide hints for better DVFS policies, leading to improved performance in heterogeneous workloads.
Findings
Faster frequency changes improve web server performance.
Current CPU policies are not optimal for heterogeneous workloads.
Application classification can guide better DVFS decisions.
Abstract
Due to thermal and power supply limits, modern Intel CPUs reduce their frequency when AVX2 and AVX-512 instructions are executed. As the CPUs wait for 670{\mu}s before increasing the frequency again, the performance of some heterogeneous workloads is reduced. In this paper, we describe parallels between this situation and dynamic power management as well as between the policy implemented by these CPUs and fixed-timeout device shutdown policies. We show that the policy implemented by Intel CPUs is not optimal and describe potential better policies. In particular, we present a mechanism to classify applications based on their likeliness to cause frequency reduction. Our approach takes either the resulting classification information or information provided by the application and generates hints for the DVFS policy. We show that faster frequency changes based on these hints are able to…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Low-power high-performance VLSI design · Advanced Data Storage Technologies
