Proposal of Automatic FPGA Offloading for Applications Loop Statements

TL;DR

This paper introduces an automatic method to identify loop statements in source code suitable for FPGA offloading, aiming to simplify heterogeneous hardware utilization and improve performance.

Contribution

It proposes and evaluates a novel automatic extraction technique for FPGA offloading of loop statements, advancing beyond previous GPU offloading automation.

Findings

Effective identification of offloadable loops demonstrated

Improved performance with automated FPGA offloading

Reduces technical barriers for heterogeneous hardware use

Abstract

In recent years, with the prediction of Moore's law slowing down, utilization of hardware other than CPU such as FPGA which is energy effective is increasing. However, when using heterogeneous hardware other than CPUs, barriers of technical skills such as OpenCL are high. Based on that, I have proposed environment adaptive software that enables automatic conversion, configuration, and high-performance operation of once written code, according to the hardware to be placed. Partly of the offloading to the GPU was automated previously. In this paper, I propose and evaluate an automatic extraction method of appropriate offload target loop statements of source code as the first step of offloading to FPGA. I evaluate the effectiveness of the proposed method using existing applications.