COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators

TL;DR

COSMOS is an automated methodology that efficiently explores the design space of hardware accelerators by coordinating high-level synthesis and memory optimization, achieving near-exhaustive results with fewer HLS tool invocations.

Contribution

It introduces a co-design and compositional approach for system-level design space exploration of accelerators, significantly reducing HLS tool calls while finding Pareto-optimal solutions.

Findings

Achieves exhaustive-like exploration with 14.6x fewer HLS invocations.

Produces a large set of Pareto-optimal implementations for each component.

Converges quickly to desired cost-performance trade-offs at the system level.

Abstract

Hardware accelerators are key to the efficiency and performance of system-on-chip (SoC) architectures. With high-level synthesis (HLS), designers can easily obtain several performance-cost trade-off implementations for each component of a complex hardware accelerator. However, navigating this design space in search of the Pareto-optimal implementations at the system level is a hard optimization task. We present COSMOS, an automatic methodology for the design-space exploration (DSE) of complex accelerators, that coordinates both HLS and memory optimization tools in a compositional way. First, thanks to the co-design of datapath and memory, COSMOS produces a large set of Pareto-optimal implementations for each component of the accelerator. Then, COSMOS leverages compositional design techniques to quickly converge to the desired trade-off point between cost and performance at the system level. When applied to the system-level design (SLD) of an accelerator for wide-area motion imagery (WAMI), COSMOS explores the design space as completely as an exhaustive search, but it reduces the number of invocations to the HLS tool by up to 14.6x.