TL;DR
The paper introduces RVSDG, a data flow-centric intermediate representation for optimizing compilers, demonstrating its feasibility and advantages through a prototype implementation and various optimizations.
Contribution
It presents the design, specification, and implementation of RVSDG, a novel IR that models programs hierarchically and supports multiple abstraction levels for compiler optimization.
Findings
RVSDG reduces complexity in compiler design.
Prototype shows competitive performance and code size.
Supports demand-dependence and structured control flow.
Abstract
Intermediate Representations (IRs) are central to optimizing compilers as the way the program is represented may enhance or limit analyses and transformations. Suitable IRs focus on exposing the most relevant information and establish invariants that different compiler passes can rely on. While control-flow centric IRs appear to be a natural fit for imperative programming languages, analyses required by compilers have increasingly shifted to understand data dependencies and work at multiple abstraction layers at the same time. This is partially evidenced in recent developments such as the MLIR proposed by Google. However, rigorous use of data flow centric IRs in general purpose compilers has not been evaluated for feasibility and usability as previous works provide no practical implementations. We present the Regionalized Value State Dependence Graph (RVSDG) IR for optimizing compilers.…
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