Prototype of Pulse Digitizer and Readout Electronics for CDEX-10 in CJPL

TL;DR

This paper presents a prototype pulse digitizer and readout electronics system for the CDEX-10 dark matter experiment, significantly improving event discrimination and energy resolution over previous systems by integrating high-speed ADCs and FPGA technology.

Contribution

The paper introduces RAIN4HPGe, a novel digitizer and readout electronics prototype with advanced ADCs and FPGA integration, enhancing discrimination and resolution in dark matter detection.

Findings

Improved energy resolution from 558 eV to 474 eV at 122 keV.

Enhanced discrimination between bulk and very bulk events.

Successful implementation of high-speed digitization with 1 GSPS ADCs.

Abstract

The CDEX (China Dark matter Experiment) is currently in the stage to upgrade to approximately 10 kg HPGe (High Purity Germanium) detectors (CDEX-10) in CJPL (China Jinping Underground Laboratory) and aims to detect the WIMP (Weakly Interacting Massive Particles). Six analog signals and one inhibited signal are outputted from preamplifier by one HPGe detector (~1 kg) of CDEX-10. The analog signals are conditioned with two 6-us and one 12-us shaping amplifiers, and three timing amplifiers respectively. The inhibited signal is used for trigger. The analog signals from shaping and timing amplifiers are digitized to obtain energy spectrum and rise-time distribution. The rise-time distribution is used to discriminate surface, bulk, and very bulk events, which can help to supress the background level in dark matter detection. Composed of commercial modules, the previous DAQ (Data Acquisition Systems) is insufficient in discriminating between bulk and very bulk events due to the limited sampling rate (100 MSPS). Besides, as number of channel increases, the system will be simplified by integrating the trigger logic in FPGA (Field Programmable Gate Array). In this paper, a prototype named RAIN4HPGe is designed with pulse digitizer and readout electronics, integrating 14-Bit 100 MSPS ADCs (Analog-to-Digital Converters), 12-Bit 1 GSPS ADCs, FPGA etc.. The RAIN1000Z1 readout module based on ZYNQ SoC (System on Chip) is used for readout over Gigabit Ethernet. Better energy resolution, e.g. improving from 558 eV to 474 eV @122 keV, can be achieved by RAIN4HPGe compared to previous DAQ (Data Acquisition Systems) with commercial solution. Moreover, the discrimination performance of bulk, and very bulk events has been improved by RAIN4HPGe with 1 GSPS ADC.