Techniques to Reduce $\pi/4$-Parity-Phase Circuits, Motivated by the ZX Calculus
Niel de Beaudrap (Department of Computer Science, University of, Oxford), Xiaoning Bian (Department of Mathematics, Statistics, Dalhousie, University), Quanlong Wang (Department of Computer Science, University of, Oxford, Cambridge Quantum Computing Ltd.)

TL;DR
This paper introduces new techniques, based on the ZX calculus, for reducing the T-count in quantum circuits, especially focusing on -parity-phase operations, to optimize fault-tolerant quantum computations.
Contribution
It develops novel methods using ZX calculus to simplify and minimize T gates in unitary circuits, improving upon previous approaches for -parity-phase operations.
Findings
Achieved T-count reductions on benchmark circuits.
Techniques are comparable or superior to previous best results.
Effective reduction of -parity-phase operations in quantum circuits.
Abstract
To approximate arbitrary unitary transformations on one or more qubits, one must perform transformations which are outside of the Clifford group. The gate most commonly considered for this purpose is the T = diag(1, exp(i \pi/4)) gate. As T gates are computationally expensive to perform fault-tolerantly in the most promising error-correction technologies, minimising the "T-count" (the number of T gates) required to realise a given unitary in a Clifford+T circuit is of great interest. We describe techniques to find circuits with reduced T-count in unitary circuits, which develop on the ideas of Heyfron and Campbell [arXiv:1712.01557] with the help of the ZX calculus. Following [arXiv:1712.01557], we reduce the problem to that of minimising the T count of a CNOT+T circuit. The ZX calculus motivates a further reduction to simplifying a product of commuting "\pi/4-parity-phase" operations:…
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