PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance
Muhammad Arsath K F, Vinod Ganesan, Rahul Bodduna, and Chester Rebeiro

TL;DR
This paper presents PARAM, a microprocessor designed with integrated countermeasures to significantly resist power side-channel attacks, demonstrating robustness on FPGA with minimal overheads.
Contribution
The paper introduces PARAM, a microprocessor with tailored countermeasures against power side-channel attacks, combining leakage analysis and targeted modifications for enhanced security.
Findings
Resists Differential Power Analysis after one million traces
Minimal area and frequency overheads compared to existing solutions
Effective countermeasures tailored to leakage sources in modules
Abstract
The power consumption of a microprocessor is a huge channel for information leakage. While the most popular exploitation of this channel is to recover cryptographic keys from embedded devices, other applications such as mobile app fingerprinting, reverse engineering of firmware, and password recovery are growing threats. Countermeasures proposed so far are tuned to specific applications, such as crypto-implementations. They are not scalable to the large number and variety of applications that typically run on a general purpose microprocessor. In this paper, we investigate the design of a microprocessor, called PARAM with increased resistance to power based side-channel attacks. To design PARAM, we start with identifying the most leaking modules in an open-source RISC V processor. We evaluate the leakage in these modules and then add suitable countermeasures. The countermeasures depend…
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