AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers
Julian Faraone, Martin Kumm, Martin Hardieck, Peter Zipf, Xueyuan Liu,, David Boland, Philip H.W. Leong

TL;DR
This paper introduces FPGA-optimized reconfigurable constant coefficient multipliers (RCCMs) for deep neural networks, achieving significant resource savings and high accuracy by replacing low-precision arithmetic with efficient multiplier designs.
Contribution
It proposes a novel family of RCCMs tailored for FPGAs and training techniques to maintain accuracy, enabling resource-efficient neural network implementations.
Findings
Up to 50% resource savings over 8-bit quantized networks.
RCCMs with lowest resource use exceed 6-bit fixed point accuracy.
All RCCM implementations match or surpass 8-bit quantization accuracy.
Abstract
Low-precision arithmetic operations to accelerate deep-learning applications on field-programmable gate arrays (FPGAs) have been studied extensively, because they offer the potential to save silicon area or increase throughput. However, these benefits come at the cost of a decrease in accuracy. In this article, we demonstrate that reconfigurable constant coefficient multipliers (RCCMs) offer a better alternative for saving the silicon area than utilizing low-precision arithmetic. RCCMs multiply input values by a restricted choice of coefficients using only adders, subtractors, bit shifts, and multiplexers (MUXes), meaning that they can be heavily optimized for FPGAs. We propose a family of RCCMs tailored to FPGA logic elements to ensure their efficient utilization. To minimize information loss from quantization, we then develop novel training techniques that map the possible coefficient…
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Taxonomy
Methods1x1 Convolution · Convolution · Local Response Normalization · Grouped Convolution · *Communicated@Fast*How Do I Communicate to Expedia? · Dropout · Dense Connections · Max Pooling · Softmax · How do I speak to a person at Expedia?-/+/
