An N-Path Filter with Multiphase PWM Clocks for Harmonic Response Suppression
Venkata S. Rayudu, Heechai Kang, R. Gharpurey

TL;DR
This paper introduces an N-path filter utilizing multiphase PWM clocks to suppress harmonic responses, enhancing RF filtering and downconversion performance by mitigating harmonic downconversion issues.
Contribution
It proposes a novel N-path filter design that employs PWM-based clocks to reduce harmonic downconversion, offering improved filtering capabilities over traditional designs.
Findings
PWM clocks effectively suppress harmonic responses.
The design enables gain control through PWM modulation.
Enhanced RF filtering performance demonstrated.
Abstract
A switched-capacitor N-path circuit can be employed for filtering an RF signal, as well as a passive downconverter. A known limitation of an N-path filter is that in addition to downconverting signals around the desired center frequency, the circuit also downconverts signals located around harmonics of the center frequency. An N-path filter that uses a PWM representation of a sinusoidal LO to mitigate harmonic downconversion is proposed in this work. Single-edge natural sampling pulse-width modulated (PWM) clocks are used to drive the switches in the N-path filter. The potential for employing PWM for providing gain control is also described.
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Taxonomy
TopicsRadio Frequency Integrated Circuit Design · Advancements in PLL and VCO Technologies · Electromagnetic Compatibility and Noise Suppression
