Leveraging access mode declarations in a model for memory consistency in heterogeneous systems

TL;DR

This paper formalizes a declarative approach for ensuring memory consistency in heterogeneous systems by leveraging access mode declarations, with a focus on correctness proof and applicability to systems like VectorPU.

Contribution

It introduces a formal model for memory consistency based on component annotations and validates the cache-coherence mechanism in VectorPU, extending to array management.

Findings

Proves correctness of VectorPU's cache-coherence mechanism

Provides a formal framework for memory consistency with access mode declarations

Studies handling of array validity in memory consistency models

Abstract

On a system that exposes disjoint memory spaces to the software, a program has to address memory consistency issues and perform data transfers so that it always accesses valid data. Several approaches exist to ensure the consistency of the memory accessed. Here we are interested in the verification of a declarative approach where each component of a computation is annotated with an access mode declaring which part of the memory is read or written by the component. The programming framework uses the component annotations to guarantee the validity of the memory accesses. This is the mechanism used in VectorPU, a C++ library for programming CPU-GPU heterogeneous systems. This article proves the correctness of the software cache-coherence mechanism used in VectorPU. Beyond the scope of VectorPU, this article provides a simple and effective formalisation of memory consistency mechanisms based on the explicit declaration of the effect of each component on each memory space. The formalism we propose also takes into account arrays for which a single validity status is stored for the whole array; additional mechanisms for dealing with overlapping arrays are also studied.