Deep Learning Regression of VLSI Plasma Etch Metrology
Jack Kenney, John Valcore, Scott Riggs, Edward Rietman

TL;DR
This paper presents a neural network-based approach for predicting VLSI plasma etch metrology measurements from limited, high-dimensional process data, achieving near-imaging accuracy and adaptability to various etch processes.
Contribution
The work introduces a domain-specific feature engineering and neural network model that effectively predicts etch measurements with limited data, adaptable to different process configurations.
Findings
Models approach imaging system error tolerance.
Effective with limited training data.
Applicable across various etch process configurations.
Abstract
In computer chip manufacturing, the study of etch patterns on silicon wafers, or metrology, occurs on the nano-scale and is therefore subject to large variation from small, yet significant, perturbations in the manufacturing environment. An enormous amount of information can be gathered from a single etch process, a sequence of actions taken to produce an etched wafer from a blank piece of silicon. Each final wafer, however, is costly to take measurements from, which limits the number of examples available to train a predictive model. Part of the significance of this work is the success we saw from the models despite the limited number of examples. In order to accommodate the high dimensional process signatures, we isolated important sensor variables and applied domain-specific summarization on the data using multiple feature engineering techniques. We used a neural network architecture…
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Taxonomy
TopicsIndustrial Vision Systems and Defect Detection · Advancements in Photolithography Techniques · Image Processing Techniques and Applications
