Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing
Xianwei Cheng, Hui Zhao, Mahmut Kandemir, Saraju Mohanty, Beilei Jiang

TL;DR
This paper presents a GPU architecture that reduces on-chip bandwidth bottlenecks for DNNs by using opportunistic computing techniques, significantly improving performance in edge computing scenarios.
Contribution
It introduces a novel GPU execution architecture with opportunistic computing to reduce data movement and alleviate bandwidth bottlenecks in DNN processing.
Findings
Up to 55% performance improvement in DNN applications
Effective reduction of data movement through opportunistic techniques
Enhanced GPU efficiency for edge computing applications
Abstract
Edge computing and IoT applications are severely constrained by limited hardware resource. This makes memory consuming DNN frameworks not applicable to edge computing. Simple algorithms such as direct convolution are finding their way in embedded machine learning. As one of the most widely used platforms for DNN acceleration, GPUs face the bottleneck of on-chip bandwidth. This work introduces a GPU DNN execution architecture that targets on relieving the on-chip bandwidth bottleneck by reducing data movement through opportunistic computing. We first investigate data access patterns in the hardware view rather than the software view. Then we propose two opportunistic computing techniques to predictably perform computation when data is available with the help of assistant warps. By moving computation to data, our techniques are able to significantly reduce data movement and relieve the…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Advanced Memory and Neural Computing · Advanced Data Storage Technologies
