Remote Control: A Simple Deadlock Avoidance Scheme for Modular System on Chip

TL;DR

This paper introduces Remote Control, a deadlock avoidance scheme for chiplet-based SoCs that improves routing flexibility and performance by segregating traffic to prevent deadlocks involving boundary routers.

Contribution

It proposes a simple, routing oblivious deadlock avoidance method that enhances flexibility and performance in modular SoC designs compared to existing solutions.

Findings

Guarantees deadlock freedom in chiplet-based systems

Reduces latency and improves throughput

Provides increased routing flexibility

Abstract

The increase in design cost and complexity have motivated designers to adopt modular design of System on Chip (SoC) by integrating independently designed small chiplets. However, it introduces new challenges for correctness validation, increasing chances of forming deadlock in the system involving multiple chiplets. Although there have been many solutions available for deadlock freedom in flat networks, the study on deadlock issue in chiplet-based systems is still in its infancy. A recent study suggests adding extra turn restrictions as a viable solution for this problem. However, imposing extra turn restrictions reduces chiplet design flexibility and interposer design complexity. In addition, it may lead to non-minimal route and traffic imbalance forming hotspots, resulting in high latency and low throughput. We propose Remote Control (RC), a simple routing oblivious deadlock avoidance scheme. Our proposal is based on two key observations. First, packets with destinations in the current chiplet are blocked by packets with destinations outside the chiplet. Second, deadlock always involves multiple boundary routers. Hence, we segregate different traffics to alleviate mutual blocking at the chiplet's boundary routers. Along with guarantee of deadlock freedom and performance enhancements, our simple RC scheme also provides more routing flexibility to both chiplet and SoC designers, as compared to the state-of-the-art.