Decentralization Issues in Cell-free Massive MIMO Networks with Zero-Forcing Precoding

TL;DR

This paper examines decentralization challenges in cell-free massive MIMO networks using zero-forcing precoding, proposing interconnection strategies among multiple CPUs to enhance network performance.

Contribution

It introduces and analyzes CPU interconnection designs in multi-CPU CF-M-MIMO systems with zero-forcing precoding, demonstrating significant performance improvements.

Findings

Modest CPU interconnection greatly improves max-min rate.

Distributed precoding offers performance benefits over centralized.

Interconnection strategies are crucial for large-area deployments.

Abstract

Cell-free massive MIMO (CF-M-MIMO) systems represent an evolution of the classical cellular architecture that has dominated the mobile landscape for decades. In CF-M-MIMO, a central processing unit (CPU) controls a multitude of access points (APs) that are irregularly scattered throughout the coverage area effectively becoming a fully distributed implementation of the M-MIMO technology. As such, it inherits many of the key properties that have made M-MIMO one of the physical layer pillars of 5G systems while opening the door to new features not available in M-MIMO. Among the latest is the possibility of performing the precoding at the CPU (centralized) or at the APs (distributed) with the former known to offer much better performance at the cost of having to collect all the relevant channel state information (CSI) at the CPU. Realistic deployments of cell-free systems are likely to require more than one CPU when the area to be covered is large, thus a critical issue that needs to be solved is how these multiple CPUs should be interconnected. This paper analyzes and proposes designs for different degrees of interconnectivity among the CPUs for the specific case of centralized zero-forcing precoding. Results show that a modest form of CPU interconnection can boost very significantly the max-min rate performance so prevalent in CF-M-MIMO architectures.