Quantum Dot Arrays in Silicon and Germanium
W. I. L. Lawrie, H. G. J. Eenink, N. W. Hendrickx, J. M. Boter, L., Petit, S. V. Amitonov, M. Lodari, B. Paquelet Wuetz, C. Volk, S. Philips, G., Droulers, N. Kalhor, F. van Riggelen, D. Brousse, A. Sammak, L. M. K., Vandersypen, G. Scappucci, M. Veldhorst

TL;DR
This paper demonstrates scalable quantum dot arrays in silicon and germanium platforms, showcasing charge sensing, array control, and integration potential for quantum computing applications.
Contribution
It introduces multi-layer fabrication of quantum dot arrays in SiMOS, Si/SiGe, and Ge/SiGe, with first-time charge sensing in Ge/SiGe and array tuning in Si/SiGe.
Findings
Successful fabrication of quantum dot arrays in three platforms.
Charge sensing achieved in Ge/SiGe for the first time.
Smallest capacitive cross talk observed in SiMOS.
Abstract
Electrons and holes confined in quantum dots define an excellent building block for quantum emergence, simulation, and computation. In order for quantum electronics to become practical, large numbers of quantum dots will be required, necessitating the fabrication of scaled structures such as linear and 2D arrays. Group IV semiconductors contain stable isotopes with zero nuclear spin and can thereby serve as excellent host for spins with long quantum coherence. Here we demonstrate group IV quantum dot arrays in silicon metal-oxide-semiconductor (SiMOS), strained silicon (Si/SiGe) and strained germanium (Ge/SiGe). We fabricate using a multi-layer technique to achieve tightly confined quantum dots and compare integration processes. While SiMOS can benefit from a larger temperature budget and Ge/SiGe can make ohmic contact to metals, the overlapping gate structure to define the quantum dots…
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