TL;DR
This paper introduces a hardware-efficient, lossless compression scheme for CNN feature maps that significantly reduces I/O bandwidth and energy consumption, improving performance for neural network inference and training accelerators.
Contribution
The paper presents a novel, hardware-friendly compression method with hardware architectures, achieving high compression ratios and low silicon area for CNN accelerators.
Findings
Achieves an average compression ratio of 5.1x for AlexNet
Reduces silicon area to less than seven 8-bit multiply-add units
Improves compression ratios for training gradient maps beyond inference
Abstract
In the wake of the success of convolutional neural networks in image classification, object recognition, speech recognition, etc., the demand for deploying these compute-intensive ML models on embedded and mobile systems with tight power and energy constraints at low cost, as well as for boosting throughput in data centers, is growing rapidly. This has sparked a surge of research into specialized hardware accelerators. Their performance is typically limited by I/O bandwidth, power consumption is dominated by I/O transfers to off-chip memory, and on-chip memories occupy a large part of the silicon area. We introduce and evaluate a novel, hardware-friendly, and lossless compression scheme for the feature maps present within convolutional neural networks. We present hardware architectures and synthesis results for the compressor and decompressor in 65nm. With a throughput of one 8-bit…
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Taxonomy
MethodsLocal Response Normalization · Grouped Convolution · *Communicated@Fast*How Do I Communicate to Expedia? · Dropout · Depthwise Convolution · Pointwise Convolution · Dense Connections · Max Pooling · Softmax · How do I speak to a person at Expedia?-/+/
