A new opportunity for two-dimensional van der Waals heterostructures: making steep-slope transistors
Juan Lv, Jing Pei, Yuzheng Guo, Jian Gong, Huanglong Li

TL;DR
This paper explores the use of 2D van der Waals metal-semiconductor interfaces for steep-slope transistors, demonstrating their potential for low-power electronics with gate-tunable barriers and subthreshold swings below 60 mV/decade.
Contribution
It introduces 2D vdW metal-semiconductor interfaces as a general platform for cold-source FETs, overcoming Fermi-level pinning issues in conventional interfaces.
Findings
Graphene can be spontaneously p-doped on InSe, opening a bandgap.
2D transition-metal dichalcogenides and carbides are promising CS materials.
Subthreshold swing below 60 mV/decade achieved with graphene and H-TaTe2.
Abstract
The use of a foreign metallic cold source (CS) has recently been proposed as a promising approach toward the steep-slope field-effect-transistor (FET). In addition to the selection of source material with desired density of states-energy relation (D(E)), engineering the source: channel interface for gate-tunable channel-barrier is crucial to a CS-FET. However, conventional metal: semiconductor (MS)-interfaces generally suffer from strong Fermi-level-pinning due to the inevitable chemical disorder and defect-induced gap states, precluding the gate-tunability of the barriers. By comprehensive materials and device modeling at the atomic-scale, we report that the two-dimensional (2D)-van der Waals (vdW)-MS-interfaces, with their atomic sharpness and cleanness, can be considered as general ingredients for CS-FETs. As test cases, InSe-based n-type FETs are studied. It is found that graphene…
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