Breaking Bandwidth Limit: A Review of Broadband Doherty Power Amplifier Design for 5G

TL;DR

This paper reviews various techniques to enhance the bandwidth of Doherty power amplifiers, crucial for high-efficiency 5G wireless transmitters, by analyzing design challenges and solutions across different technologies.

Contribution

It provides a comprehensive overview of bandwidth enhancement methods for DPA, including circuit design insights and IC implementation challenges for 5G applications.

Findings

Bandwidth enhancement techniques improve DPA performance

Various architectures enable broadband DPA design

IC implementation varies across technologies and frequencies

Abstract

The Doherty power amplifier (DPA) has been extensively explored in the past and has become one of the most widely used power amplifier (PA) architectures in cellular base stations. The classical DPA suffers intrinsic bandwidth constrains which limit its application in future 5G wireless transmitters. In this paper, we present a comprehensive review of the DPA bandwidth enhancement techniques proposed in literature in order to provide a thorough understanding of the DPA's broadband design for high-efficiency 5G wireless transmitters. We elaborate on the main bandwidth limitation sources and provide circuit design insights. We then follow with an overview of bandwidth enhancement techniques developed for the DPA, including modified load-modulation networks, frequency response optimization, parasitic compensation, post-matching, as well as distributed DPA, dual-input digital DPA, transformer-based power-combining PA, and transformer-less load modulated PA architectures. Furthermore, challenges and design techniques for integrated circuit (IC) implementation of broadband DPAs are discussed, including a review of circuits developed in CMOS, SiGe, and GaN processes, and operating in RF and mm-Wave frequencies.