# BagNet: Berkeley Analog Generator with Layout Optimizer Boosted with Deep Neural Networks

## TL;DR

This paper introduces a deep learning-enhanced optimization framework for analog circuit design that significantly reduces the number of costly post-layout simulations by using a neural network discriminator to guide the search process.

## Contribution

It presents a novel learning framework that integrates a neural network discriminator with evolutionary optimization to improve sample efficiency in analog layout design.

## Key findings

- Achieves at least two orders of magnitude improvement in sample efficiency.
- Effectively applies to large circuit examples, including optical link receivers.
- Reduces the need for extensive post-layout simulations in analog design.

## Abstract

The discrepancy between post-layout and schematic simulation results continues to widen in analog design due in part to the domination of layout parasitics. This paradigm shift is forcing designers to adopt design methodologies that seamlessly integrate layout effects into the standard design flow. Hence, any simulation-based optimization framework should take into account time-consuming post-layout simulation results. This work presents a learning framework that learns to reduce the number of simulations of evolutionary-based combinatorial optimizers, using a DNN that discriminates against generated samples, before running simulations. Using this approach, the discriminator achieves at least two orders of magnitude improvement on sample efficiency for several large circuit examples including an optical link receiver layout.