Efficient Uncertainty Modeling for System Design via Mixed Integer Programming

TL;DR

This paper introduces M-gPC, a novel uncertainty modeling technique that efficiently handles mixed continuous and discrete uncertainties in computer architecture, reducing simulation samples drastically compared to Monte Carlo methods.

Contribution

The paper extends generalized polynomial chaos to mixed uncertainties and develops a mixed-integer programming approach for efficient sampling in architectural analysis.

Findings

Achieves accurate uncertainty estimates with only 95 samples in CMP models.

Reduces simulation effort compared to Monte Carlo (from 50,000 to 95 samples).

Demonstrates effectiveness on CMP and DRAM subsystem models.

Abstract

The post-Moore era casts a shadow of uncertainty on many aspects of computer system design. Managing that uncertainty requires new algorithmic tools to make quantitative assessments. While prior uncertainty quantification methods, such as generalized polynomial chaos (gPC), show how to work precisely under the uncertainty inherent to physical devices, these approaches focus solely on variables from a continuous domain. However, as one moves up the system stack to the architecture level many parameters are constrained to a discrete (integer) domain. This paper proposes an efficient and accurate uncertainty modeling technique, named mixed generalized polynomial chaos (M-gPC), for architectural uncertainty analysis. The M-gPC technique extends the generalized polynomial chaos (gPC) theory originally developed in the uncertainty quantification community, such that it can efficiently handle the mixed-type (i.e., both continuous and discrete) uncertainties in computer architecture design. Specifically, we employ some stochastic basis functions to capture the architecture-level impact caused by uncertain parameters in a simulator. We also develop a novel mixed-integer programming method to select a small number of uncertain parameter samples for detailed simulations. With a few highly informative simulation samples, an accurate surrogate model is constructed in place of cycle-level simulators for various architectural uncertainty analysis. In the chip-multiprocessor (CMP) model, we are able to estimate the propagated uncertainties with only 95 samples whereas Monte Carlo requires 5*10^4 samples to achieve the similar accuracy. We also demonstrate the efficiency and effectiveness of our method on a detailed DRAM subsystem.