An overdetermined linear equations-based time calibration method for fast sampling ASICs

TL;DR

This paper introduces a new overdetermined linear equations-based time calibration method for waveform sampling ASICs, improving timing precision by compensating for irregular sampling intervals caused by process variations.

Contribution

It proposes a novel calibration technique using linear equations derived from known input signals, enhancing timing accuracy in SCA ASICs.

Findings

Effective calibration of sampling intervals achieved

Improved timing resolution demonstrated in ASIC tests

Method applicable to high energy physics experiments

Abstract

A novel time calibration method for waveform sampling application specific integrated circuits (ASICs) based on switched capacitor arrays (SCAs) is proposed in this paper. Precision timing extraction using SCA ASICs has been proved to be a promising technique in many high energy physics experiments. However, such ASICs suffer from irregular sampling intervals caused by process variations. Therefore, careful calibration is required to improve the time resolution of such systems. We evaluated the limitation of a popular method using the proportionality between voltage amplitude and sampling interval of adjacent switched-capacitor cells responding to either a sawtooth wave or a sine wave. The new time calibration method presented here utilizes the relationship between sampling intervals and the known input signal period to establish overdetermined linear equations, and the roots of these equations correspond to the actual sampling intervals. We applied this new method to a pulse timing test with an ASIC designed by our team, and the test results indicate that the new time calibration method is effective.