Design and testing of a bunch-by-bunch beam position transverse feedback processor

TL;DR

This paper presents the design and testing of a bunch-by-bunch transverse feedback processor for SSRF, focusing on precise synchronization, delay adjustment, and successful initial beam tests to suppress multi-bunch instabilities.

Contribution

It introduces a novel clock synchronization and delay adjustment method using PLLs and delay lines for transverse feedback electronics.

Findings

ENOB of ADC > 9 bits from 100 kHz to 700 MHz

Closed loop attenuation > 40 dB at critical frequencies

Initial beam tests confirmed system effectiveness

Abstract

Shanghai Synchrotron Radiation Facility (SSRF) is a 3.5 GeV storage ring with a bunch rate of 499.654 MHz, harmonic number of 720, and circumference of 432 meters. SSRF injection works at 3.5 GeV, where the multi-bunch instabilities limit the maximum stored current. In order to suppress multi-bunch instabilities caused by transverse impedance, a bunch-by-bunch transverse feedback system is indispensable for SSRF. The key component of that system is the bunch-by-bunch transverse feedback electronics. An important task in the electronics is precise time synchronization. In this paper, a novel clock synchronization and precise delay adjustment method based on the PLLs and delay lines are proposed. Test results indicate that the ENOB (Effective Number Of Bits) of the analog-to-digital conversion circuit is better than 9 bits in the input signal frequency range from 100 kHz to 700 MHz, and the closed loop attenuation at the critical frequency points is better than 40 dB. The initial commissioning tests with the beam in SSRF are also conducted, and the results are consistent with the expectations.