# Design and Implementation of a Neural Network Based Predistorter for Enhanced Mobile Broadband

## TL;DR

This paper presents a neural network-based predistorter for wireless transmitters that improves linearity and efficiency, reducing latency and increasing throughput compared to traditional polynomial methods.

## Contribution

Introduces a novel neural network training method for predistortion that outperforms polynomial models in linearity and efficiency, with FPGA implementation benefits.

## Key findings

- Significant reduction in adjacent channel leakage ratio.
- 42% decrease in latency on FPGA.
- 9.6% increase in throughput with fewer multiplications.

## Abstract

Digital predistortion is the process of correcting for nonlinearities in the analog RF front-end of a wireless transmitter. These nonlinearities contribute to adjacent channel leakage, degrade the error vector magnitude of transmitted signals, and often force the transmitter to reduce its transmission power into a more linear but less power-efficient region of the device. Most predistortion techniques are based on polynomial models with an indirect learning architecture which have been shown to be overly sensitive to noise. In this work, we use neural network based predistortion with a novel neural network training method that avoids the indirect learning architecture and that shows significant improvements in both the adjacent channel leakage ratio and error vector magnitude. Moreover, we show that, by using a neural network based predistorter, we are able to achieve a 42% reduction in latency and 9.6% increase in throughput on an FPGA accelerator with 15% fewer multiplications per sample when compared to a similarly performing memory-polynomial implementation.