DeepShift: Towards Multiplication-Less Neural Networks

TL;DR

DeepShift introduces multiplication-less neural networks using shift and sign flip operations, significantly reducing computation and energy consumption while maintaining high accuracy, suitable for edge devices.

Contribution

The paper proposes convolutional and fully-connected shift operations to replace multiplications, enabling efficient neural networks with minimal accuracy loss and reduced inference latency.

Findings

Achieved comparable or higher accuracy than baseline models after conversion.

Reduced GPU inference latency by 25% with shift-based kernels.

Models require only 5 bits or less for weight representation.

Abstract

The high computation, memory, and power budgets of inferring convolutional neural networks (CNNs) are major bottlenecks of model deployment to edge computing platforms, e.g., mobile devices and IoT. Moreover, training CNNs is time and energy-intensive even on high-grade servers. Convolution layers and fully connected layers, because of their intense use of multiplications, are the dominant contributor to this computation budget. We propose to alleviate this problem by introducing two new operations: convolutional shifts and fully-connected shifts which replace multiplications with bitwise shift and sign flipping during both training and inference. During inference, both approaches require only 5 bits (or less) to represent the weights. This family of neural network architectures (that use convolutional shifts and fully connected shifts) is referred to as DeepShift models. We propose two methods to train DeepShift models: DeepShift-Q which trains regular weights constrained to powers of 2, and DeepShift-PS that trains the values of the shifts and sign flips directly. Very close accuracy, and in some cases higher accuracy, to baselines are achieved. Converting pre-trained 32-bit floating-point baseline models of ResNet18, ResNet50, VGG16, and GoogleNet to DeepShift and training them for 15 to 30 epochs, resulted in Top-1/Top-5 accuracies higher than that of the original model. Last but not least, we implemented the convolutional shifts and fully connected shift GPU kernels and showed a reduction in latency time of 25% when inferring ResNet18 compared to unoptimized multiplication-based GPU kernels. The code can be found at https://github.com/mostafaelhoushi/DeepShift.

Figures

Tables

Table 1. Table 1 : MNIST Accuracy Results

Method	Train from Scratch	Train from Pre-trained
Simple FC
Original	96.92%	-
DeepShift-Q	97.03%	94.91%
DeepShift-PS	98.26%	98.26%
Simple CNN
Original	98.75%	-
DeepShift-Q	98.81%	99.15%
DeepShift-PS	99.12%	99.16%

Table 2. Table 2 : CIFAR10 Accuracy Results

Model	Method	Train from Scratch	Train from Pre-trained
ResNet18	Original	94.45%	-
	DeepShift-Q	94.42%	94.25%
	DeepShift-PS	93.20%	94.12%
MobileNet	Original	93.57%	-
	DeepShift-Q	93.63%	93.04%
	DeepShift-PS	92.64%	92.78%
VGG19-Small	Original	92%	-
	DeepShift-PS	91.57%	N/A
	AdderNet [11]	93.02%	N/A
	ShiftAddNet* [28]	90%	N/A

Table 3. Table 3 : ResNet18 CIFAR10 Accuracy Results for Lower Bitwidths

Method	W	A	Train from Scratch	Train from Pre-trained
Original	32	32	94.45%	-
DeepShift-PS	5	32	93.20%	94.12%
	5	16	85.54%	94.15%
	5	8	86.28%	93.96%
	4	32	94.12%	94.13%
	3	32	92.85%	91.16%
	2	32	92.80%	90.68%
DeepShift-Q	5	32	94.60%	94.43%
	5	16	94.06%	93.70%
	5	8	94.14%	93.65%
	4	32	94.11%	94.38%
	3	32	88.28%	92.04%
	2	32	69.97%	89.96%

Table 4. Table 4 : Imagenet Accuracy Results: Training from Pre-trained Baseline. “W” refers to number of bits to represent weights. “Top-N” accuracy means that the correct class gets to be in the Top-N probabilities for it to count as “correct”.

Model	Method	W	Top-1		Top-5
			Accuracy	Delta	Accuracy	Delta
ResNet18	Original	32	69.76%	-	89.08%	-
	DeepShift-Q [Ours]	5	69.56%	-0.20%	89.17%	+0.09%
	DeepShift-PS [Ours]	5	69.27%	-0.49%	89.00%	-0.08%
	INQ [64]	5	69.36%	-0.40%	89.09%	+0.01%
	ABC* [43]	5	68.30%	-1.00%	87.90%	-1.30%
	DeepShift-Q [Ours]	4	69.56%	-0.20%	89.14%	+0.06%
	DeepShift-PS [Ours]	4	69.02%	-0.74%	88.73%	-0.35%
	INQ* [64]	4	68.88%	+0.63%	89.01%	+0.32%
ResNet50	Original	32	76.13%	-	92.86%	-
	DeepShift-Q [Ours]	5	76.33%	+0.22%	93.05%	+0.19%
	DeepShift-PS [Ours]	5	75.93%	-0.20%	92.90%	+0.04%
	INQ [64]	5	75.01%	-1.12%	92.45%	-0.41%
GoogleNet	Original	32	69.78%	-	89.53%	-
	DeepShift-Q [Ours]	5	70.73%	+0.95%	90.17%	+0.64%
	DeepShift-PS [Ours]	5	69.87%	+0.09%	89.62%	+0.09%
	INQ [64]	5	71.25%	+1.47%	90.33%	+0.70%
	LogQuant* [9]	6	69.14%	-0.36%	88.86%	-0.28%
VGG16	Original	32	71.59%	-	90.38%	-
	DeepShift-Q [Ours]	5	71.56%	-0.03%	90.48%	+0.10%
	DeepShift-PS [Ours]	5	71.39%	-0.20%	90.33%	-0.05%
	INQ [64]	5	71.32%	-0.27%	90.29%	-0.09%
	LogQuant* [9]	6	N/A	N/A	89.62%	-0.31%
AlexNet	Original	32	56.52%	-	79.07%	-
	DeepShift-Q [Ours]	5	55.81%	-0.71%	78.79%	-0.28%
	DeepShift-PS [Ours]	5	55.90%	-0.62%	78.73%	-0.34%
	INQ [64]	5	56.13%	-0.39%	78.83%	-0.24%

Table 5. Table 5 : Imagenet Accuracy Results: Training from Scratch. “Compute” refers to the type of arithmetic instruction the convolution and fully-connected layers are based on.

Model	Method	Compute	Top-1		Top-5
			Accuracy	Delta	Accuracy	Delta
ResNet18	Original	Multiply	69.76%	-	89.08%	-
	DeepShift-Q [Ours]	Shift & Sign Flip	65.32%	-4.44%	86.30%	-2.78%
	DeepShift-PS [Ours]	Shift & Sign Flip	65.34%	-4.42%	86.05%	-3.03%
	BWN* [53]	Sign Flip	60.80%	-9.30%	83.00%	-6.20%
	TWN* [39]	Sign Flip	61.80%	-3.60%	84.20%	-2.56%
ResNet50	Original	Multiply	76.13%	-	92.86%	-
	DeepShift-Q [Ours]	Shift & Sign Flip	70.73%	-5.56%	90.16%	-2.70%
	DeepShift-PS [Ours]	Shift & Sign Flip	71.90%	-4.23%	90.16%	-2.70%
VGG16	Original	Multiply	71.59%	-	90.38%	-
	DeepShift-Q [Ours]	Shift & Sign Flip	70.87%	-0.71%	90.09%	-0.29%

Table 6. Table 6 : Inference Time Speed Up of DeepShift. Inference time shown is the total time to infer the validation images of the corresponding dataset.

Model	Dataset	Inference Time		Inference Speed Up
		Original	DeepShift
ResNet18	CIFAR10	19.42 s	11.80 s	39%
ResNet18	ImageNet	2010 s	1490 s	26%

Equations

$$\begin{array}{r}{2}^{\tilde{p}}x=\{\begin{array}{l}x<<\tilde{p}\text{ if }\tilde{p}>0\\ x>>\tilde{p}\text{ if }\tilde{p}<0\\ x\text{ if }\tilde{p}=0\end{array}\end{array}\text{such that}\tilde{p}\in \text{mathds}Z$$

$$\begin{array}{r}\text{flip}(x,\tilde{s})=\{\begin{array}{l}-x\text{ if }\tilde{s}=-1\\ 0\text{ if }\tilde{s}=0\\ x\text{ if }\tilde{s}=+1\end{array}\end{array}\text{such that}\tilde{s}\in \{-1,0,+1\}$$

$$W\to \text{flip}(2^{\tilde{P}},\tilde{S})$$

$$\begin{array}{rl}S& =\text{sign}(W)\\ \tilde{S}& =S\end{array}$$

$$\begin{array}{rl}P& ={\text{log}}_2(\text{abs}(W))\\ \tilde{P}& =\text{round}(P)\end{array}$$

$$\begin{array}{r}{\tilde{W}}_q=\text{flip}(2^{\tilde{P}},\tilde{S})\end{array}$$

$$\begin{array}{rl}\frac{\partial C}{\partial X}& =\frac{\partial C}{\partial Y}\frac{\partial Y}{\partial X}=\frac{\partial C}{\partial Y}{\tilde{W}}_q\\ \frac{\partial C}{\partial W}& =\frac{\partial C}{\partial Y}\frac{\partial Y}{\partial {\tilde{W}}_q}\frac{\partial {\tilde{W}}_q}{\partial W}=\frac{\partial C}{\partial Y}X\frac{\partial {\tilde{W}}_q}{\partial W}\\ \frac{\partial C}{\partial b}& =\frac{\partial C}{\partial Y}\end{array}$$

$$\frac{\partial {\tilde{W}}_q}{\partial W}\approxeq 1$$

$$\frac{\partial C}{\partial W}\approxeq X\frac{\partial Y}{\partial {\tilde{W}}_q}$$

$$\begin{array}{rl}\tilde{P}& =\text{round}(P)\\ \tilde{S}& =\text{sign}(\text{round}(S))\\ {\tilde{W}}_{ps}& =\text{flip}(2^{\tilde{P}},\tilde{S})\end{array}$$

$$\tilde{s}=\{\begin{array}{l}-1\text{ if }s\le -0.5\\ 0\text{ if }-0.5<s<0.5\\ +1\text{ if }s\ge 0.5\end{array}$$

$$\begin{array}{rl}\frac{\partial C}{\partial X}& =\frac{\partial C}{\partial Y}\frac{\partial Y}{\partial X}\\ & =\frac{\partial C}{\partial Y}{W}_{ps}^T\\ \frac{\partial C}{\partial P}& =\frac{\partial C}{\partial Y}\frac{\partial Y}{\partial {\tilde{W}}_{ps}}\frac{\partial {\tilde{W}}_{ps}}{\partial \tilde{P}}\frac{\partial \tilde{P}}{\partial P}\\ \frac{\partial C}{\partial S}& =\frac{\partial C}{\partial Y}\frac{\partial Y}{\partial {\tilde{W}}_{ps}}\frac{\partial {\tilde{W}}_{ps}}{\partial \tilde{S}}\frac{\partial \tilde{S}}{\partial S}\\ \frac{\partial C}{\partial b}& =\frac{\partial L}{\partial Y}\end{array}$$

$$\frac{\partial {\tilde{W}}_{ps}}{\partial \tilde{S}}=\frac{\partial \text{flip}(2^{\tilde{P}},\tilde{S})}{\partial \tilde{S}}\approxeq 1$$

$$\begin{array}{rl}\frac{\partial {\tilde{W}}_{ps}}{\partial \tilde{P}}& =\frac{\partial \text{flip}(2^{\tilde{P}},\tilde{S})}{\partial \tilde{P}}=\frac{\partial \text{flip}(2^{\tilde{P}},\tilde{S})}{\partial (2^{\tilde{P}})}\frac{\partial (2^{\tilde{P}})}{\partial \tilde{P}}\\ & \approxeq \text{flip}(2^{\tilde{P}},\tilde{S})2^{\tilde{P}}\text{ln}2={\tilde{W}}_{ps}\text{ln}2\end{array}$$

$$\begin{array}{rl}\frac{\partial C}{\partial P}& \approxeq \frac{\partial C}{\partial Y}\frac{\partial Y}{\partial {\tilde{W}}_{ps}}\widetilde{W_{ps}}\text{ln}2\\ \frac{\partial C}{\partial S}& \approxeq \frac{\partial C}{\partial Y}\frac{\partial Y}{\partial {\tilde{W}}_{ps}}\end{array}$$

Full text

We propose to alleviate this problem by introducing two new operations: convolutional shifts and fully-connected shifts which replace multiplications with bitwise shift and sign flipping during both training and inference. During inference, both approaches require only 5 bits (or less) to represent the weights. This family of neural network architectures (that use convolutional shifts and fully connected shifts) is referred to as DeepShift models. We propose two methods to train DeepShift models: DeepShift-Q which trains regular weights constrained to powers of 2, and DeepShift-PS that trains the values of the shifts and sign flips directly.

Very close accuracy, and in some cases higher accuracy, to baselines are achieved. Converting pre-trained 32-bit floating-point baseline models of ResNet18, ResNet50, VGG16, and GoogleNet to DeepShift and training them for 15 to 30 epochs, resulted in Top-1/Top-5 accuracies higher than that of the original model. Last but not least, we implemented the convolutional shifts and fully connected shift GPU kernels and showed a reduction in latency time of 25% when inferring ResNet18 compared to unoptimized multiplication-based GPU kernels. The code can be found at https://github.com/mostafaelhoushi/DeepShift.

1 Introduction

Reducing the energy consumption, time latency, and memory requirements of deep neural networks for both inference and training are two requirements researchers are trying to achieve. For inference, deep neural networks are increasingly being targeted for mobile and IoT applications. Devices at the edge have a lower power and price budget as well as constrained memory size. Moreover, the amount of communication between different levels of memory in computing platforms also has a major role in the power requirements of a CNN. If communication between device and cloud becomes necessary (e.g. in case of model updates etc), model size could affect the connectivity costs. Therefore, for mobile / IoT inference applications, model optimization, size reduction, faster inference, and lower power consumption are key areas of research.

For training, the energy required to train an average deep learning model on GPU servers is equivalent to using fossil fuel releasing around 78,000 pounds of carbon, which is more than half of a car’s output during its lifetime [56]. According to a report by OpenAI [6], the computation power required to train the largest neural network models doubles every 3.4 months, with an increase of 300,000$\times$ since 2012. Moreover, training on edge devices, e.g., in limited scenarios (including online learning, model adaptation, one/few-shot learning), is a growing field [18, 59]. Therefore, for both cloud/server and edge / mobile applications, reducing energy and time consumption of training is required.

Several approaches are being considered to address those needs and as such these efforts can be divided into a few categories. One approach is to design efficient models from the ground up resulting in novel network architectures that are more efficient to train and infer [34]. However, that proves to be a task requiring a lot of training resources to explore multiple variants of architectures to find the best fit. Another approach is to start with a big model initially and prune it [22, 19, 40, 45, 41]. Pruning can be done by zeroing out individual parameters in model layers to reduce multiply-and-accumulate (MAC) operations (weight pruning) [22] or by removing whole blocks of parameters in convolutional layers (filter pruning) [19].

Although pruning increases the efficiency for inference, it does not increase the efficiency of training as it requires training larger models from the start. Another large category of techniques to accelerate inference and/or training is quantization, which this paper falls under.

In such quantization techniques, the parameters of a model are converted from high-precision 32-bit floating-point representation to lower-precision smaller bit-width floating-point representations, such as 16-bits [49] or 8-bits [57, 35], fixed-point representations [24], or other representations with bit-widths that can range from 5-bits to 2-bits [43, 65] and 1-bit [33]. Some quantization techniques start with a full-precision pre-trained model (hence accelerating inference only)[43] while others train from models from scratch and hence accelerating both inference and training [39]. Key attractions of these techniques are that they can be easily applied to various kinds of networks and they not only reduce the model size but also require less complex compute units on the underlying hardware. This results in a smaller model footprint, less working memory (and cache), faster computation on supporting platforms, and lower power consumption. Moreover, some quantization techniques replace multiplication with cheaper operations such as binary XNOR operations [43, 33, 47] or bitwise shifts [64]. Binary XNOR techniques have high accuracy on small datasets such as MNIST or CIFAR10, but they suffer high degradation on complex datasets such as Imagenet [53]. On the other hand, bit-wise shift techniques have proven to show a minimal drop in accuracy on Imagenet [64].

This paper presents an approach to reduce computation and power requirements of CNNs by replacing regular multiplication-based convolution and linear operations, also known as a fully-connected layer or matrix multiplication, with bitwise-shift-based convolution and linear operations respectively. Applying bitwise shift operation on an element is mathematically equivalent to multiplying it by a power of 2. We compare our work with one similar approach that replaces multiplications with bitwise shift and sign flips: Incremental Network Quantization (INQ) [64], and another approach that replaces multiplications with sign flips only: Accurate Binary Convolution (ABC). We propose two approaches: DeepShift-Q and DeepShift-PS. Both our DeepShift approaches are based on training the shift values (i.e. the powers of 2) and sign flips either indirectly or directly, while INQ is based on rounding 32-bit floating-point weights to powers of 2. To the best of our knowledge, this paper is the first to propose training the shift values directly, which is the main novelty of the paper. Moreover, INQ requires starting from a pre-trained model (hence can only accelerate inference) while both of our DeepShift proposed approaches can accelerate both inference and training.

This paper makes the following contributions:

• •

We introduce two different methods to train DeepShift networks, neural networks with powers of 2 weights: each method trains the powers of 2 at run-time, and when computing the parameters’ gradients at train-time (see Section 3).

• •

We conduct experiments for each training method, which show that it is possible to train DeepShift networks on CIFAR-10 and Imagenet, from scratch or from pre-trained full-precision weights and exceed or achieve nearly state-of-the-art results (see Section 5).

• •

We develop bitwise-shift-based matrix multiplication and convolution GPU kernels that are able to run the DeepShift ResNet18 architecture with 25% faster inference times than the baseline ResNet18 model with an unoptimized GPU kernel (see Section 6.1 ).

2 Related Work

This section covers related works which fall into three categories. First, innovative new network architectures have been proposed that reduce the model sizes as well as computation requirements. [34] proposed SqueezeNet achieving 50x fewer parameters compared to AlexNet. [32] proposed MobileNets, based on a streamlined architecture that uses depth-wise separable convolutions to build lightweight DNNs, followed by MobileNetV2 [54] introducing inverted residual structure where the input and output of the residual blocks are thin bottleneck layers opposite to traditional residual models. [12] Proposed reducing spatial redundancy in CNN by replacing usual convolution operations with Octave Convolution, a spatially less-redundant variant.

Secondly, model quantization techniques have been an active research area and various approaches have been developed. [16] proposed Binary Connect constraining weights to only two values (-1 or 1). [53] improve on Binary Connect, introducing Binary Weight Networks (BWNs), employing channel-wise scaling factors, while [39] introduced Ternary Weight Networks (TWNs). [66] extended TWN with Trained Ternary Quantization (TTQ), with non-uniform and trainable scaling factors. Other works like Binarized Neural Networks [15], XNOR-Net [53], Bi-Real Net [46] and ABCNet [43] quantize both weights and activations to either -1 or 1.

[64] proposed Incremental Network Quantization (INQ) to quantize pre-trained full-precision DNNs with weights constrained to zeros and powers of two. It replaces multiplications in convolutions with bitwise shifts and sign-flips but during inference only and not training. Hence, it cannot be used to reduce the energy consumption of on-device training (e.g., for transfer learning or zero-/one- shot training) nor on the cloud. INQ’s approach involves iteratively partitioning the weights into two sets, one of which is quantized while the other is retrained to compensate for accuracy degradation. After each iteration, a bigger portion of the floating-point weights are converted to powers of 2, and the remaining portion is trained again. INQ introduces a new hyperparameter, the fraction of weights that are rounded to powers of 2 at each iteration. The authors of INQ listed the iterative steps they used for each CNN architecture, that was obtained or tuned empirically. Unlike INQ, our method does not introduce a new hyperparameter.

LogNN [52] is another method that converts weights as well as activations to powers of 2. However, it requires manual empirical tuning rather than training. The authors of LogNN did present an algorithm to train weights and activations in powers of 2, but it was only implemented on pre-trained models on CIFAR10 dataset. Also, LogNN does not convert the first layer, which may consume up to 20% of the FLOPs in CNN architectures, to bitwise shifts, while our approach converts all layers. Furthermore, the authors did not explain how sign-flip of weights should be trained. The authors of LogNN also presented a hardware implementation in [38]. LogQuant [9] and ShiftCNN [23] presented methods to convert the weights of a pre-trained model to powers of 2, such that no further training is needed and with a minimal decrease in accuracy. ShiftCNN replaces each multiplication with a group of 2 or 3 bitwise shifts, while our approach replaces each multiplication with a single bitwise shift.

To the best of our knowledge, DeepShift is the first method to train a model from scratch using powers of 2.

[10] proposed low-precision activations using Half-Wave Gaussian Quantization (HWGQ) while weights are binarized using BWN. [20] introduced Symmetric Quantization (SYQ) by pixel-wise scaling factors and fixed-point activation quantization. DoReFa-Net [65], PACT [14] and PACT-SAWB [13] allows weights and activation to be variable configurable. [48] proposed uniform noise injection for non-uniform quantization (UNIQ) of both weights and activations. [42] use multi-bit quantization. [63] proposed an adaptively learnable quantizer (LQ-Nets).

Thirdly pruning can be used to reduce model redundancy. Several pruning works have been proposed that employ various kinds of ranking mechanisms. [27] introduced hyperbolic and exponential biases for pruning in the late 80s. [29] and [37] published some of the other earlier works on pruning. More recently, [26] proposed Deep Compression, a method that leverages pruning, weight sharing, and Huffman Coding for model compression. [42] proposed Runtime Neural Pruning, a framework that prunes the deep neural network dynamically at the runtime. Pruning introduces another complexity to the mix since after pruning the computation units need to be able to handle sparse matrix arithmetic which adds some overhead.

Finally, efficient kernel libraries [2] , [4], [1], [3], [50] and custom hardware targeting reduced precesion have been developed to improve inference performance [5], [25], [60].

3 DeepShift Networks

As shown in Figure 1, the main concept of this paper is to replace multiplication with bitwise shift and sign flip. If the underlying binary representation of an input number, $x$ is in integer or fixed-point format, a bit-wise shift of $\tilde{p}$ bits, where $\tilde{p}$ is an integer, to the left (or right) is mathematically equivalent to multiplying by a positive (or negative power) of 2:

[TABLE]

For simplicity, we will use $<<\tilde{p}$ to implicitly denote a left shift if $\tilde{p}$ is positive and right shift if $\tilde{p}$ is negative.

Bitwise shift can only be equivalent to multiplying by a positive number, because $2^{\pm\tilde{p}}>0$ for any real value of $\tilde{p}$. However, in neural networks, it is necessary for the training to have the equivalent of multiplying by negative numbers in its search space, especially in convolutional neural networks where filters with both positive and negative weights contribute to detecting edges. Therefore, we also need to use the sign flip (a.k.a negation) operation. We use a ternary sign operator, i.e., an operator that can either leave its operand unchanged, replace it with 0, or changes the sign of its operand. The sign flip operation can be represented mathematically as:

[TABLE]

Similar to bitwise shift, sign flip is a computationally cheap operation too as it involves returning the 2’s complement of a number.

We introduce novel operators, LinearShift and ConvShift, that, in the forward pass, replace multiplication with bitwise shift and sign flip. Hence, the weight matrix, $W$, whether it is used for linear operation (i.e., $Y=WX+b$) or convolution operation (i.e., $Y=W\circledast X+b$), will be replaced by elementwise product of the shift matrix $\tilde{P}$ and sign matrix $\tilde{S}$.

[TABLE]

In the following sub-sections, we shall present two different methods to train the LinearShift and ConvShift operators of our DeepShift models: DeepShift-Q and DeepShift-PS. Both approaches use Equation 3 for the forward pass but differ in the backward pass and differ in how $\tilde{P}$ and $\tilde{S}$ are derived. Both approaches are summarized in Figure 2.

3.1 DeepShift-Q

In the DeepShift-Q approach, training is similar to the regular training approach of linear or convolution operations with weight $W$, but in the forward pass and backward pass the weight matrix is quantized to $\tilde{W}_{q}$ by rounding it to the nearest power of 2:

[TABLE]

[TABLE]

[TABLE]

Hence, the forward pass for our LinearShift operator will be $Y=\tilde{W}_{q}X=\text{flip}(2^{\tilde{P}},\tilde{S})X$ and for our ConvShift operator will be $Y=\tilde{W}_{q}\circledast X+b=\text{flip}(2^{\tilde{P}},\tilde{S})\circledast X+b$.

The gradients of the backward pass can be expressed as:

[TABLE]

where $\frac{\partial C}{\partial Y}$ is the output gradient to the operator (derivative of the model loss (a.k.a cost function), $C$, with respect to the operator output), $\frac{\partial C}{\partial X}$ is the input gradient to the operator (derivative of the model loss with respect to the operator input)111We have simplified the expression of $\frac{\partial C}{\partial X}$ in Equation 7. To be exact, it is equivalent to $\frac{\partial C}{\partial Y}\tilde{W}_{q}^{T}$ for LinearShift and $\tilde{W}_{q}^{rot180^{\circ}}\circledast\frac{\partial C}{\partial Y}$ for ConvShift., and $\frac{\partial C}{\partial W}$ is the derivative of the model loss with respect to the operator weights 222For LinearShift, $\frac{\partial C}{\partial W}=X^{T}\frac{\partial C}{\partial Y}$ and for ConvShift $\frac{\partial C}{\partial W}=X\circledast\frac{\partial C}{\partial Y}$.

Since $W_{q}$ is a rounded value of $W$, the differentiation $\frac{\partial\tilde{W}_{q}}{\partial W}$ is zero at all points except at the points where $W$ is a power of 2. This will result in $W$ not being updated during backpropagation, and hence no learning or updating of $W$. We solve this issue by using a straight-through estimator (STE) [62]:

[TABLE]

Hence, $\frac{\partial C}{\partial W}$ is set to:

[TABLE]

Figure 2(a) summarizes the forward and backward passes of DeepShift-Q.

3.2 DeepShift-PS

DeepShift-PS on the other hand directly uses the shift, $P$, and sign flip, $S$, as the trainable parameters:

[TABLE]

Note the definition of sign flip operation, $\tilde{S}$, implies that it is a ternary value rather than a binary parameter, as each element in the matrix can take one of 3 values:

[TABLE]

where $s$ is an element of matrix $S$ and $\tilde{s}$ is an element of $\tilde{S}$.

The gradients of the backward pass can be expressed as:

[TABLE]

We use the straight through estimators to express the derivatives of the round function and the sign function: $\partial\text{round}(x)\approxeq\partial x\text{ , }\partial\text{sign}(x)\approxeq\partial x$. Hence, $\frac{\partial\text{round}(x)}{\partial x}\approxeq 1\text{ , }\frac{\partial\text{sign}(x)}{\partial x}\approxeq 1$. However, for the flip function we use a modified straight through estimator: $\frac{\partial\text{flip}(x,s)}{\partial x}\approxeq\text{flip}(x,s)\text{ , }\frac{\partial\text{flip}(x,s)}{\partial s}\approxeq 1$.

Based on that, we set $\frac{\partial\tilde{P}}{\partial P}\approxeq 1$ and $\frac{\partial\tilde{S}}{\partial S}\approxeq 1$. Hence, $\frac{\partial\tilde{W}_{ps}}{\partial\tilde{S}}$ is evaluated as:

[TABLE]

and, $\frac{\partial\tilde{W}_{ps}}{\partial\tilde{P}}$ is evaluated as:

[TABLE]

Hence, the gradients of the weights with respect to loss are set to:

[TABLE]

Figure 2(b) summarizes the forward and backward passes of DeepShift-PS.

4 Implementation

We implement the forward and backward passes of our two custom ops, LinearShift and ConvShift, using PyTorch. Similar to [33], we emulate the precision of an actual bitwise shift hardware implementation by rounding the input and bias of both ops to 32-bit fixed-point format precision (16-bit for integer part and 16-bit for fraction part) before applying the forward pass.

To initialize the weights, we use Kaiming initialization [30] for $W_{q}$ in DeepShift-Q, and uniform random distribution to initialize $P$ and $S$ in DeepShift-PS.

In DeepShift-PS, L2 normalization has been slightly modified to occur on $W_{PS}$ rather than on $P$ on $S$, i.e. the regularization term added is $\sum{W_{PS}^{2}}=\sum{{2^{P}S}^{2}}$ rather than $\sum{P^{2}}+\sum{S^{2}}$. This modification of L2 normalization was necessary to avoid gradient descent from pushing shift parameters, $P$, from values whose squares are large, like -14 or -8, but are actually equivalent to multiplication with small weights, $2^{-8}$ and $2^{-14}$, to values whose squares are small like 0 or 1, but are actually equivalent to multiplying with relatively large weight values, 1.0 or 0.5, respectively.

Since activations are represented as 32-bit fixed point activations, the theoretical range of shift values that we need to support are -31 to +31, and this requires $\text{log}_{2}(31-(-31)+1)=\text{log}_{2}(63)\approxeq 6$ bits to represent shift. However, we noticed that shift values that result from training are rarely positive (i.e., most of the time $\text{abs}(W_{Q})<1$, hence $P<0$ as $P=\text{log}_{2}(\text{abs}(\text{round}(W_{Q})))$ 333This expression holds for both $W_{Q}$ and $W_{PS}$). Further testing that we performed showed that high accuracy can be retained if we constrain shift values to be between 0 and -14 or 0 and -15. Therefore, we only need 4 bits to represent shift. Adding the bit required for the sign flip operation, we need 5 bits in total. During training, shift values that fell outside the supported shift ranges were clipped. In some of the results that we will explain in the upcoming sections, we have also experimented with fewer bits to represent weight, i.e., constraint shift values to shorter ranges.

5 Benchmark Results

We have tested the training and inference results on 2 datasets: CIFAR10 [36], and Imagenet [17]. For each dataset, we have tested a group of architectures. We have explored various evaluations for the models:

Original Version: evaluating the original architecture with standard convolution and linear operators, 2. 2.

DeepShift Versions:

1. (a)

Train from Scratch: start with randomly initialized weights, convert all the convolution and linear operators to their shift counterparts, and train from scratch using either training method Deepshift-Q or DeepShift-PS, 2. (b)

Train from Pre-trained Baseline: start with baseline model that is pretrained with 32-bits floating points weights, convert all the convolution and linear operators to their shift counterparts, convert the weights (using Equations 4 and 5) and train using either training method Deepshift-Q or DeepShift-PS.

We have noticed - in terms of validation accuracy results - that the best optimizer for DeepShift-PS is Rectified Adam (RAdam) [44] while the best optimizer for DeepShift-Q and regular 32-bit floating-point training is stochastic gradient descent (SGD). On the other hand, most methods in literature that explore alternatives to multiplication or quantizing weight representations use SGD only. We will show in one of our tests in CIFAR10 that using RAdam optimizer does not add an unfair advantage over other methods.

5.1 MNIST Data Set

To verify the performance of DeepShift on a small dataset like MNIST, two simple models were trained and tested:

• •

Simple FC: a simple fully-connected model consisting of 3 linear layers with feature output sizes 512, 512, and 10 respectively. Dropout layers with a probability of 0.2 were inserted in between the layers. All intermediate layers had a ReLu activation following it.

• •

Simple CNN: a model consisting of 2 convolutional layers and 2 linear layers. The 2 convolutional layers had output channels sizes 20 and 50 respectively, and both had kernel sizes of 5x5 and strides of 1. Max pooling layers of window size 2x2 followed by ReLu activation were inserted after each convolution layer. The linear layers had output feature sizes of 500 and 10 respectively.

A learning rate of 0.01, a momentum of 0.0, as well as a batch size of 64, was used to train. The training plot is shown in Figure 3. The accuracy on the validation set is shown in Table 1.

5.2 CIFAR10 Data Set

ResNet18 [31] and MobileNetv2 [54] models were trained from scratch on CIFAR10 using both DeepShift methods. The models were trained with a momentum of 0.9 and weight decay of $1\text{\times}{10}^{-4}$. The loss criterion used was categorical cross-entropy. The learning rate used to train was 0.1 that decays by a factor of 0.1 at epochs 80, 120, and 160, the number of epochs for training was 200, and the batch size was 128.

For ResNet18, we have added an additional test of training the baseline (multiplication-based) 32-bit floating-point weights using RAdam, to compare it with DeepShift-PS that uses RAdam. This test was made to ensure that the comparisons are fair and that the use of RAdam as an optimizer is not giving an unfair advantage to DeepShift-PS. The best accuracy reached by the baseline ResNet18 model with SGD was 94.45% and with RAdam was 94.06%.

For training starting with a pre-trained model, the learning rate was $1\times 10^{-3}$, decaying with a rate of 0.1 every 5 epochs, and the number of epochs was 15.

In order to compare with other multiplication-less models, we also trained VGG19-Small [55] from scratch to compare with AdderNet [11], that replaces multiplications with additions, and ShiftAddNet [28] that combined our DeepShift-PS approach with AdderNet. In Table 2 we mark ShiftAddNet with an asterisk to indicate that the accuracies shown are based on the results from the authors’ paper rather than being reproduced by us. In order to make a fair comparison, the results shown are based on using 32-bit fixed-point activations.

The training plots are shown in 4. The numerical results for evaluating the validation set for various scenarios are shown in Table 2. The results show that on CIFAR10, training with bit-wise shifts is capable is obtaining results almost the same as, and in the case of MobileNetv2 with DeepShift-Q, more than the multiplication-based baseline.

5.2.1 Lower Bit Widths

Table 3 shows the results for using fewer bits to represent weights or activations. For 16-bit activations, we used a fixed-point representation with 3-bits to represent the integer part, and 13-bits to represent the fraction part. Similarly for 8-bit activations, we used 3-bits to represent the integer part, and 13-bits to represent the fraction part. For training 8-bit or 16-bit activations from scratch, we changed the initial learning rate to 0.001.

We can see that for 3-bits and 2-bits weights, training from scratch obtained higher accuracy than training from a pre-trained baseline. This is because, converting the pre-trained weights to powers of 2 constrained to a short range, caused many weight values to be clipped to the same value. Hence the distribution of weights of a model that is randomly initialized, i.e., training from scratch, is better than weights of a pre-trained model clipped to small values [51]. Moreover, the results show that DeepShift-PS outperforms DeepShift-Q when training from scratch for smaller weight bit-widths.

On the other hand, DeepShift-Q outperforms DeepShift-PS when training from scratch using 16-bit or 8-bit activations, while both are close to baseline accuracies when trained from pre-trained weights.

5.3 Imagenet Data Set

We categorize methods in literature that accelerate neural networks by replacing multiplications with cheaper operations or by quantization, into methods:

• •

that train from pre-trained baseline: INQ [64], ABC [43], and

• •

that train from scratch, BWN [53], TWN [39].

In each of the following two sub-sections, we compare DeepShift to each category. Results for various CNN architectures for both categories are shown in Tables 4 and 5. Since different papers report different accuracies for full-precision baselines, we either attempt to reproduce the results of a method or report the difference between the accuracy of the method and its corresponding baseline (method names marked with asterisks).

5.3.1 Training from Pre-Trained Baseline

Table 4 compares DeepShift trained from a pre-trained baseline to INQ and ABC methods. Column “W” shows the number of bits to represent weights in each method. The DeepShift models were trained with momentum of 0.9, weight decay of $1\text{\times}{10}^{-4}$, the loss criterion categorical cross-entropy, the initial learning rate was 0.001 that decays by a factor of 0.1 every 5 epochs.

INQ [64] (Incremental Network Quantization) replaces multiplications in convolutions with bitwise shifts and sign-flips, but during inference only and not training. It also introduces a hyperparameter, a list of portions per iteration to round the weights to power of 2. This list of portions is obtained in an empirical manner for each architecture. DeepShift on the other hand does not introduce any hyperparameter. INQ was originally developed using Caffe, and the pre-trained baselines reported were significantly lower than what we have using PyTorch. Hence, to start with the same baseline, we used the PyTorch implementation of INQ [8] to report the accuracies in Table 4. In terms of accuracies, both INQ and DeepShift exceed or almost meet the baseline accuracies of most architectures. For ResNet18, we also compare using 4-bits to represent weights.

ABC [43] (Accurate Binary Convolution) neural networks replace multiplication with XNOR (i.e., sign flip) operation. Comparing with the same number of bits, 5, for weight representation, DeepShift obtains higher accuracy than ABC.

5.3.2 Training from Scratch

Models were trained from scratch for 90 epochs, the learning rate used to train from scratch was 0.01 that decays by a factor of 0.1 every 30 epochs. Training plots are shown in Figure 5 and results are shown in Table 5.

For ResNet18, we compare the performance of DeepShift that replaces multiplications with bitwise shifts and sign flips, with BWN (Binary Weight Networks) & TWN (Ternary Weight Networks) that replace multiplications with sign flips only.

6 Efficiency Analysis

Multiplication in integer or fixed-point format consists of multiple bitwise shifts, ANDs, and additions. Floating point (FP) multiplication consists of more steps such as adding the exponents, & normalizing. In terms of CPU cycles, taking a 32-bit Intel Atom instruction processor as an example, integer and FP multiplication instruction take 5 to 6 cycles, while bit-wise shift takes only 1 cycle ([21]). ([7]) shows for 16-bit architectures, average power, and area of multipliers are at least $9.7\times$, and $1.45\times$, respectively, of bitwise shifter: 22.05 nW to 54.83 nW vs 1.32 nW to 2.27 nW, and 8.7K to 29K transistor count vs 2K to 6K only. A common optimization in C++ compilers is to detect an integer multiplication with a power of 2 and replace it with a bitwise shift. Our contribution is enabling bitwise shifts in training neural networks while achieving good accuracy. We emphasize that we replace each multiplication with a single bitwise shift.

DeepShift also achieves model storage compression by representing the weights with fewer bits. This reduces the memory footprint of the model and increases energy savings for transferring weights between different layers of memory of a GPU or CPU ([58]). That is needed in mobile and IoT applications, where memory footprint is a primary constraint. Energy savings is crucial for applications like drones that fly on batteries, whether the computing platform is a low-end CPU, GPU, or FPGA. Also, bitwise shift operators are a good candidate for in-memory computing research [58], as they’re cheaper in size and energy to place in or near memory than multiplication.

6.1 GPU Implementation

While custom hardware designs have been proposed by [38], [61] and [23], we have implemented a GPU kernel that obtained a speedup of  26% on ResNet18 on ImageNet. To the best of our knowledge, this is the first paper to implement a CUDA kernel convolution using bitwise shifts.

39% on the CIFAR10 version of ResNet18 and a speedup of The total time to infer the validation images of each dataset is shown in Table 6.

It is noteworthy that the baseline that we compared against is a custom multiplication-based convolution kernel which is slower than NVIDIA’s cuDNN optimized kernel. Future work can be done to optimize our bitwise-shift CUDA kernels to compare them with NVIDIA’s cuDNN multiplication-based kernels, such as fusing convolution with ReLu, tuning the tiling factors, and performing JIT (just-in-time) compilation of CUDA kernels at runtime.

Some of the challenges that we faced during implementation that limited the speedup of the kernel: were that the GPU’s instruction set architecture was not optimized for using smaller bit-width parameters that were needed to represent the shift and sign. Having to extract the 4-bit shift value and 1-bit sign value from 32-bit integers using masking and extra shifts incurred a lot of overhead. Also, if-else statements on the values of the sign bits to determine whether to add or subtract during accumulation or if-else conditions on whether shift values are positive or negative to determine whether to shift left or right, adding more overhead.

The implementation of the kernel can be found our GitHub repo.

7 Future Work

We have proven that we can train models using bitwise shift and sign flips from pre-trained full-precision models and obtain accuracies above or almost the same as the original accuracies. This can minimize energy and latency for on-device training for applications like transfer learning on the edge. Although training from scratch resulted in drops of 2% to 3% in Top-5 accuracy, DeepShift can also save energy consumption on the cloud.

The hardware realization of DeepShift neural networks is yet to be done and is needed to evaluate the actual speedup in performance. Designing parallel architectures for bitwise shift and negation on vectors rather than on individual registers may face its own challenges but it is expected to have faster execution times than their multiplication counterparts.

While other methods that tackle neural network speed-ups such as BNNs perform well on small datasets (e.g., MNIST and CIFAR10) but suffer significant degradation on big datasets such as Imagenet, DeepShift networks proved that they are suitable for Imagenet.

Also, a GPU kernel of performing convolution using bitwise shift has been implemented as a proof-of-concept. Developing GPU instruction set architectures to make them more optimized for smaller bit-width data types, and shift operations (e.g., an assembly instruction that can deduce bitwise shift should be done in the opposite direction if the shift value is negative) will help in making bitwise-shift-based training and inference more common. Moreover, the existence of vector CPU instructions that can perform bitwise shifts given a vector of integers, and a vector of shift values, can make DeepShift more optimal on CPUs. Evaluating DeepShift on custom FPGA design, or extending CPU and GPU instruction sets with dedicated bitwise shift and negate instructions that operate on a vector and/or compressed 5-bit representation is one direction to explore. Also, we suggest training models from scratch with both activations and weights represented as powers of 2, similar to [52] that did that for inference only. Moreover, to speed up training, we suggest to try gradients represented as 8-bit or 16-bit fixed points.

Acknowledgments

We thank Ahmed Eltantawy for providing us valuable feedback to implement the CUDA kernels, and Sara Elkerdawy for providing valuable insights during our discussions. We thank also the PyTorch team for providing example training scripts and pre-trained model files for the Imagenet dataset that allowed us to reproduce the accuracies of the original models’ papers.