# Polystore++: Accelerated Polystore System for Heterogeneous Workloads

## TL;DR

Polystore++ proposes an architecture to accelerate heterogeneous workload processing by integrating hardware accelerators like FPGAs, GPUs, and CGRAs, addressing performance bottlenecks in modern analytics.

## Contribution

It introduces a novel architecture for polystore systems that leverages hardware accelerators to improve performance and energy efficiency for diverse workloads.

## Key findings

- Identifies key components suitable for hardware acceleration.
- Discusses optimization strategies for heterogeneous query execution.
- Highlights challenges and potential solutions for integrating accelerators.

## Abstract

Modern real-time business analytic consist of heterogeneous workloads (e.g, database queries, graph processing, and machine learning). These analytic applications need programming environments that can capture all aspects of the constituent workloads (including data models they work on and movement of data across processing engines). Polystore systems suit such applications; however, these systems currently execute on CPUs and the slowdown of Moore's Law means they cannot meet the performance and efficiency requirements of modern workloads. We envision Polystore++, an architecture to accelerate existing polystore systems using hardware accelerators (e.g, FPGAs, CGRAs, and GPUs). Polystore++ systems can achieve high performance at low power by identifying and offloading components of a polystore system that are amenable to acceleration using specialized hardware. Building a Polystore++ system is challenging and introduces new research problems motivated by the use of hardware accelerators (e.g, optimizing and mapping query plans across heterogeneous computing units and exploiting hardware pipelining and parallelism to improve performance). In this paper, we discuss these challenges in detail and list possible approaches to address these problems.