A Comparative Study of Analog/Digital Self-Interference Cancellation for Full Duplex Radios
Jong Woo Kwak, Min Soo Sim, In-Woong Kang, Jong Sung Park, Jaedon, Park, Chan-Byoung Chae

TL;DR
This paper presents a simulator to analyze combined analog and digital self-interference cancellation techniques in full-duplex radios, enabling optimization of system parameters before hardware implementation.
Contribution
It introduces a comprehensive simulator for integrated analysis of analog and digital SIC, considering system parameters like ADC resolution and PA nonlinearity.
Findings
Simulator enables performance evaluation of SIC techniques
Allows optimization of analog canceller configurations
Facilitates pre-hardware tuning and system design
Abstract
Self-interference (SI) is the main obstacle to full-duplex radios. To overcome the SI, researchers have proposed several analog and digital domain self-interference cancellation (SIC) techniques. How well the digital cancellation works depends on the results of analog cancellation. Therefore, to analyze overall SIC performance, one should do so in an integrated manner. In this paper, we build a simulator that can analyze the performance of analog and digital SIC techniques. Through this simulator, we can analyze the overall SIC performance within various system parameters such as the resolution of an analog-to-digital converter (ADC) and/or nonlinearity of a power amplifier (PA). With our simulator, we expect that configurations and tuning algorithms of an active analog canceller can be optimized before real hardware implementation.
| System Parameter | Notation | Values |
|---|---|---|
| Center Frequency | ||
| Bandwidth | ||
| FFT Size | 64 | |
| Used Subcarrier | 52 | |
| CP Length | 16 | |
| ADC Resolution | 10, 14, | |
| TX Power | 5 dBm | |
| PA Gain | 15dB | |
| 5.64 dBm, 23.17 dBm | ||
| Receiver Noise Floor | -80 dBm | |
| Power Initialization |
| Source | Attenuation | Delay |
|---|---|---|
| Direct Leakage | ||
| Reflection from antenna | ||
| Reflection from objects | ||
| Reflection from objects | ||
| Reflection from objects | ||
| Reflection from objects |
| Power Levels | Adaptive Circuit | 10-bit ADC | 14-bit ADC | -bit ADC |
|---|---|---|---|---|
| Analog: | Analog: | Analog: | ||
| TX Power: 5 dBm | Single-tap | Linear Digital: | Linear Digital: | Linear Digital: |
| PA1 | () | Nonlinear Digital: | Nonlinear Digital: | Nonlinear Digital: |
| (: 23.17 dBm, Gain: 15 dB) | Analog: | Analog: | Analog: | |
| Receiver Noise: -80 dBm | Double-tap | Linear Digital: | Linear Digital: | Linear Digital: |
| (, ) | Nonlinear Digital: | Nonlinear Digital: | Nonlinear Digital: | |
| Analog: | Analog: | Analog: | ||
| TX Power: 5 dBm | Single-tap | Linear Digital: | Linear Digital: | Linear Digital: |
| PA2 | () | Nonlinear Digital: | Nonlinear Digital: | Nonlinear Digital: |
| (: 5.64 dBm, Gain: 15 dB) | Analog: | Analog: | Analog: | |
| Receiver Noise: -80 dBm | Double-tap | Linear Digital: | Linear Digital: | Linear Digital: |
| (, ) | Nonlinear Digital: | Nonlinear Digital: | Nonlinear Digital: |
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Taxonomy
TopicsFull-Duplex Wireless Communications · Radar Systems and Signal Processing · Electromagnetic Compatibility and Measurements
A Comparative Study of Analog/Digital Self-Interference Cancellation
for Full Duplex Radios
††thanks: This work was in part supported by Agency for Defense Development.
Jong Woo Kwak1, Min Soo Sim1, In-Woong Kang2, Jong Sung Park2, Jaedon Park2, and Chan-Byoung Chae1
1School of Integrated Technology, Yonsei Institute of Convergence Technology, Yonsei University, Korea
Email: {kjw8216, simms, cbchae}@yonsei.ac.kr
2Agency for Defense Development, Korea
Email: {iwkang, jspark61, jaedon2}@add.re.kr
Abstract
Self-interference (SI) is the main obstacle to full-duplex radios. To overcome the SI, researchers have proposed several analog and digital domain self-interference cancellation (SIC) techniques. How well the digital cancellation works depends on the results of analog cancellation. Therefore, to analyze overall SIC performance, one should do so in an integrated manner. In this paper, we build a simulator that can analyze the performance of analog and digital SIC techniques. Through this simulator, we can analyze the overall SIC performance within various system parameters such as the resolution of an analog-to-digital converter (ADC) and/or nonlinearity of a power amplifier (PA). With our simulator, we expect that configurations and tuning algorithms of an active analog canceller can be optimized before real hardware implementation.
Index Terms:
Full-duplex radio, self-interference cancellation, analog self-interference cancellation, 5th generation (5G) communications
I Introduction
As demand continues to grow for increasing spectral efficiency and data rates, researchers have discovered a highly promising technology for 5G wireless communications—full-duplex [1]. The main challenge in a full-duplex radio is self-interference (SI)—a phenomenon where a transmit signal is received by its own receiver. SI significantly degrades the signal-of-interest unless it can be canceled through self-interference cancellation (SIC), and several SIC methods have been proposed to solve this problem.
In typical full-duplex systems [3, 2, 19], SIC is done in both analog and digital domains. Analog cancellation first suppresses the SI. Analog cancellation can be categorized into two classes—passive and active. In the former, an RF component suppresses the SI at the propagation. In the latter, the SI is regenerated by adaptive RF components and destructively added to the received signal. An adaptive circuit is generally used for the active analog cancellation [4, 2, 5]. Its cost includes additional power and computational overhead. A crucial issue then is designing an efficient circuit structure and tuning algorithm.
Remaining SI from analog cancellation is next mitigated by digital cancellation. Digital cancellation is based on a channel estimation of the residual SI channel after analog cancellation. Therefore, digital cancellation is dependent on the results of analog cancellation. In previous studies on digital cancellation, researchers have signified the analog cancellation in the simulation just as linear attenuation [6, 7]. The main obstacle to the digital cancellation is a nonlinearity caused by the RF imperfection. The authors in [9, 10, 7, 8] discussed nonlinear digital cancellation methods that handle the power amplifier’s (PA) nonlinearity, in-phase and quadrature (I/Q) imbalances, and phase noise. Generally, the nonlinear digital cancellation requires more computational overhead than its linear counterpart.
In this paper, we build an OFDM-based analog-digital self-interference cancellation simulator (Fig. 1) that directly reflects the results of analog cancellation in the digital cancellation. Considered in the simulation are such practical limitations such as PA’s nonlinearity, the analog-to-digital converter (ADC) dynamic range. Through extensive simulations, we can design an efficient full-duplex system by analyzing the hardware and computational complexity and the performance of cancellation.
The rest of this paper is organized as follows. In Section II, we discuss the hurdles of the SIC. In Section III, we introduce our simulation methodology of the self-interference cancellation and also present adopted analog cancellation and digital cancellation methods. In Section IV, we present comparative performance evaluations of the adopted SIC methods in the OFDM system. Finally, in Section V, we present our conclusions.
II Self-interference cancellation
The most significant hurdle for SIC is the fact that an ADC has to convert the SI and signal-of-interest simultaneously. It is possible only if the SI is sufficiently removed in the analog domain to fall within the dynamic range of the ADC. Fig. 2 illustrates an example of the relation between power levels and SIC performances in a full-duplex system. Moreover, transmitter noises must be suppressed to the receiver noise floor in the analog domain since it cannot be handled by digital cancellation. In the typical full-duplex system, it is not possible to satisfy the ADC requirement with the passive analog cancellation alone [11, 12]. In a single antenna system, for instance, a circulator is widely used as an isolator. A circulator is a 3-port device that steers the signal entering any port, transmitting it to the next port only [2]. When a signal enters to Port 1, the ferrite changes a magnetic resonance pattern to create a null at Port 3. It is known that a typical isolation value of an RF circulator is approximately 15 to .
Recently, to satisfy the requirements mentioned above, an adaptive circuit-based active analog cancellation is adopted in a full-duplex system. The authors in [2] proposed an adaptive circuit composed of fixed delays and variable attenuators; these regenerate and subtract the leakages from the circulator. The leakages consist of the following three components: 1) direct leakage from Port 1 to Port 3, 2) reflection from the antenna at Port 2, and 3) reflection from objects near the transceiver. Theoretically, this requires an infinite number of fixed delay lines to completely mitigate the SI that has an actual unknown delay. Due to practical issues, the authors in [2] used eight different fixed delay lines to cancel out each main leakage component (i.e., direct leakage and reflection from the antenna). In this case, a required size of the circuit must be 10\times$$10\text{\,}\mathrm{cm}, which is not implementable in small mobile devices. Not only does the size of the circuit linearly increase as the number of taps increased, but the required computational overhead for tuning also increases. A structure and tuning algorithm of the adaptive circuit should be designed considering both the SIC performance and the system requirements.
III Simulation of the self-interference cancellation
In this section, we introduce how each block of the simulator, shown in Fig. 1 is modeled. First, we represent the SI channel using a tapped-delay-line (TDL) model. Passive analog cancellation is modeled as the taps that have the attenuation and the delay of the leakage. A fixed delay line in the active analog cancellation is modeled in the same way, where the amplitude and the phase of the tap are controlled by a tuning algorithm in the baseband. We then transform the SI channel into a baseband equivalent form. We adopt a baseband modeling of the nonlinear PA, DAC, and ADC.
III-A Passband simulation
In the simulation of analog SIC, we have to generate the leakage delays from passive analog SIC. A time-invariant passband channel is represented as
[TABLE]
where is the number of taps, is a gain of the -th tap, and is a delay of the -th tap. We model a circulator with two delayed taps for the rest of this paper. In the simulation, the direct leakage has attenuation and delay, and the reflection from the antenna has attenuation and delay. A problem occurs when the delay is not a multiple of the simulation period. We can resolve this problem by choosing a simulation period as a divisor of all the delays we want to generate in the simulation. In practice, however, the delay of each leakage is a continuous random variable in practice, which is impossible to be represented as a multiple of the simulation period.
Typically, a passband channel is transformed into a baseband equivalent form to avoid the misaligned problem in the simulation [13]. The equivalent transformation is well-known and easy to calculate with an assumption of an ideal sinc interpolation in the digital-to-analog converter (DAC). Fig. 3 depicts a block diagram of the DAC in the simulation. An impulse response of sample-and-hold is defined as
[TABLE]
where is the baseband elementary period. The reconstruction filter is the causal Butterworth filter of order 3 and a cut-off frequency of , where is the bandwidth of the baseband signal.
With this DAC setup, we calculate a baseband equivalent form of (1). Let the impulse response of the given Butterworth filter be . A baseband equivalent form of the arbitrary passband channel tap is represented as
[TABLE]
where is the baseband equivalent form of the passband channel tap . Summing all the taps in the passband channel (1), we get the baseband equivalent channel as
[TABLE]
Table II depicts the simulated passband tap delays and attenuations.
III-B Active analog cancellation simulation
For the simulation of active analog cancellation we adopt a simple adaptive circuit. It consists of fixed delay lines with variable attenuators and phase shifters. Values of the attenuators and phase shifters are tuned via solving
[TABLE]
where is the attenuation and phase shifter value of the -th delay line, is the frequency domain representation of , and is the frequency response of the -th delay line without attenuation and phase shifting. The authors in [5] theoretically modeled and then formulated (5) as a convex problem. Instead, we obtain through the following steps: 1) Set as
[TABLE]
where is the fixed delay value of -th delay line. 2) Calculate the baseband equivalent channel using (4). 3) Send a pilot and estimate the channel in the frequency domain to obtain . Using a precalculated frequency response of the circuit (i.e., ), we can solve (5) by the least square method. During the initial stage, the pilot is transmitted with little power to avoid the ADC saturation without the active analog cancellation.
III-C Digital cancellation simulation
To simulate digital cancellation, we consider both the linear and nonlinear digital cancellation. Linear digital cancellation assumes that the residual SI channel is linear. A frequency response of the channel at the -th subcarrier can be estimated as
[TABLE]
where and are the pilot and received signals at the -th subcarrier. The residual SI is then reconstructed as
[TABLE]
where is the known transmitted signal at the -th subcarrier. Then the reconstructed SI is subtracted from the received signal.
The limitation of linear digital cancellation is nonlinear SI components, which mainly come from the PA’s nonlinearity. The parallel Hammerstein model [15, 14] is widely used to describe the nonlinearity as
[TABLE]
where and are the time domain input and output signals on time , is the highest order of the model, is the number of the model’s taps, and are the nonlinear coefficients. The received signal is then modeled as
[TABLE]
where and are the received signal and noise at time , is the number of baseband equivalent channel taps, and are the effective nonlinear coefficients of the channel. Fig. 4 compares the characteristics of the PA implemented in the simulation compare to the linear PA. Each PA is modeled as
[TABLE]
Similar to the linear digital cancellation, are estimated using pilot signals [6]. The residual SI is then reconstructed and subtracted.
IV Performance evaluations and discussions
In this section, we provide the following numerical analysis:
- •
Compare the performance of the adaptive circuit with a different configuration (i.e., the number of delay lines and fixed delay values).
- •
Performance evaluation of the adopted analog and digital cancellation method with different ADC resolution and power amplifier nonlinearity.
Fig. 5 shows a comparison of the single-tap adaptive circuit with different fixed delay value. Analog cancellation amount of the single-tap circuit is maximized when the fixed delay is . A red line depicts the results of the analog and linear digital cancellation. In this case, the overall SIC performance is dependent on the analog cancellation, as the nonlinear SI components are mitigated by the analog cancellation only. A yellow line depicts the results of the analog and nonlinear digital cancellation. The overall SIC performance reveals, in this case, a certain tendency. This is because of the parallel Hammerstein model fully describes the system adopted in the simulation, aside from the quantization noise in ADC. In practice, transmitter noise will still remain if it is not suppressed to the receiver noise floor in the analog domain.
Table III shows the cancellation amounts of the adopted analog and digital cancellation methods. We compare the double-tap (50 ns, 250 ns) adaptive circuit to the single-tap (150 ns) adaptive circuit. Intuitively, the double-tap adaptive circuit shows better analog cancellation performance in the case of PA1, whose is 23.17 dBm. However, the performances of the single-tap and the double-tap canceller are saturated in the case of PA2, whose is 5.64 dBm. It is because the tuning algorithm is based on the linear SI channel estimation. Although the adaptive circuit can mitigate the nonlinear SI component since the circuit tapped the transmitted signal as an input, it still assumes that the SI channel is linear. Therefore, the performance of the active analog cancellation deteriorates as the PA nonlinearity increases.
The linear digital cancellation shows better performance in the case of PA1, which has lower nonlinearity than the PA2. As noted in Section II, the ADC dynamic range set a minimum goal for the analog cancellation. For instance, at least a 40 dB of analog cancellation must be achieved in the case of a 10-bit ADC since the dynamic range of 10-bit ADC is about 60 dB. The simulation results show that it is insufficient due to the high peak-to-average power ratios (PAPR) of OFDM signals. Even though the analog cancellation amount is approximately 45 dB in the case of 10-bit ADC with PA2, digital cancellation has poor performances because some of the OFDM signals are clipped. A 14-bit ADC provides sufficient dynamic range for all the cases in the simulation. Therefore, the adopted cancellation methods have the almost same performances with the -bit ADC cases.
V Conclusion
In this paper, we have described a simulator that evaluates the analog-digital integrated SIC performances in the OFDM system. For a realistic simulation, we reflect the practical characteristics of PA, DAC, and ADC. Performance of the adopted circuit is analyzed in the various system environments and circuit configurations. Through the simulation, we can configure an efficient full-duplex system. For future work, we will consider an extension to a MIMO full-duplex configuration [16, 17, 18].
VI Appendix
Let be the DAC input baseband signals at the -th time slot. The output signals of the sample-and-hold block in the DAC, is represented as
[TABLE]
where is the length of the transmitted baseband signal. After the low-pass filtering, the ouput signals of the DAC, is then represented as
[TABLE]
Then the passband signal is
[TABLE]
Finally, the received baseband signal is obtained as
[TABLE]
where is the received baseband signal at -th time slot. Now the received baseband signal is represented as a linear combination of the transmitted baseband signal. In the case of causal Butterworth filter, we get (3).
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