Characterization of 0.18{\mu}m CMOS Ring Oscillator at Liquid Helium Temperature

TL;DR

This paper characterizes and models 0.18μm CMOS ring oscillators at liquid helium temperature, optimizing energy efficiency with forward body biasing, and reports low power, low phase noise performance at 4.2K.

Contribution

It provides a detailed characterization and modeling of CMOS devices at liquid helium temperature and demonstrates energy-efficient ring oscillator design using forward body biasing.

Findings

Achieved low power dissipation of 2.13μW at 4.2K.

Demonstrated phase noise of -177.57dBc/Hz@1MHz.

Optimized oscillator speed and current with FBB at cryogenic temperature.

Abstract

This paper presents low power dissipation, low phase noise ring oscillators (ROs) based on Semiconductor Manufacturing International Corporation (SMIC) 0.18{\mu}m CMOS technology at liquid helium temperature (LHT). First, the characterization and modelling of CMOS at LHT are presented. The temperature-dependent device parameters are revised and the model then shows good agreement with the measurement results. The ring oscillator is then designed with energy efficiency optimization by application of forward body biasing (FBB). FBB is proposed to compensate for the threshold voltage (VTH) shift to preserve the benefits of the enhancement of the carrier mobility at 4.2K. The delay per stage ({\tau}p), the static current (ISTAT), the dynamic current (IDYN), the power dissipation (P) and the phase noise (L(foff)) are analyzed at both 298 K and 4.2 K, with and without FBB. The performance of the designed RO in terms of speed ({\tau}p=179ps), static current (23.55nA/stage), power dissipation (2.13{\mu}W) and phase noise (-177.57dBc/Hz@1MHz) can be achieved at 4.2K with the supply voltage (VDD) reduced to 0.9V.