# A Reconfigurable Dual-Mode Tracking SAR ADC without Analog Subtraction

**Authors:** Mehdi Safarpour, Reza Inanlou, Olli Silven, Timo Rahkonen, Omid Shoaei

arXiv: 1905.08895 · 2019-05-30

## TL;DR

This paper introduces a reconfigurable 8-bit SAR ADC that reduces power consumption by limiting the quantization search space using an analytic approach, without modifying the analog circuitry.

## Contribution

It proposes a novel reconfigurable SAR ADC design that incorporates a priori information to minimize power consumption in tracking mode, with no analog modifications needed.

## Key findings

- Significant power reduction in oversampling mode
- Reduced number of SAR cycles improves efficiency
- Design is reconfigurable between conventional and tracking modes

## Abstract

In this contribution, it is proposes to limit the quantization search space of a successive approximation analog-to-digital converter through an analytic derivation of maximum possible sample-to-sample variation. The presented example design of the proposed ADC is an 8-bit 1MS/s ADC with SAR logic customized to incorporate this priori information while no modification has been required to the analog circuitry. In comparison to conventional SAR conversion, the proposed tracking approach yields significant reduction in total power consumption in oversampling mode. The power savings are due to the reduced number of SAR cycles, and voltage variation minimization across DAC capacitors. The design is reconfigurable both to conventional SAR sampling and the proposed tracking scheme. The approach is attractive for SAR ADCs embedded in very low power micro-controllers.

## Full text

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## Figures

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## References

10 references — full list in the complete paper: https://tomesphere.com/paper/1905.08895/full.md

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Source: https://tomesphere.com/paper/1905.08895