Load Characterization and Power Conditioner Synthesis Using Higher-Order Elements

TL;DR

This paper introduces a novel approach to characterize nonlinear and time-varying loads using higher-order circuit elements like memristors, meminductors, and memcapacitors, and synthesizes power conditioners for load compensation.

Contribution

It presents a new load characterization method based on higher-order elements and a synthesis technique for power conditioners, applicable to various power electronic loads.

Findings

Effective load characterization using higher-order elements.

Successful synthesis of power conditioners for specific loads.

Potential for improved harmonic distortion mitigation.

Abstract

It is shown that virtually all nonlinear and/or time-varying loads that generate harmonic current distortion can be characterized in terms of so-called higher-order circuit elements. The most relevant higher-order elements exploited in this paper are the memristor, meminductor, and memcapacitor. Such elements naturally arise by introducing constitutive relationships in terms of higher-order voltage and current differentials and integrals. Consequently, the power conditioner necessary to compensate for the load current distortions is synthesized similarly. The new characterization and compensation synthesis is applied to the half-wave rectifier and the controlled bridge converter.

Equations

$$u^{(\alpha )}(t)=\frac{d^{\alpha }}{d{t}^{\alpha }}u(t),$$

$$i^{(\beta )}(t)=\frac{d^{\beta }}{d{t}^{\beta }}i(t),$$

$$u^{(\alpha )}(t)=f\left[i^{(\beta )}(t)\right],\text{or}{i}^{(\beta )}(t)=g\left[u^{(\alpha )}(t)\right],$$

$$u_s(t)=A\sin (\omega t),$$

$$i_l(t)=a_1\cos (\omega t)+b_1\sin (\omega t)+\underset{i_h(t)}{\underbrace{a_2\cos (2\omega t)}},$$

$$P=\frac{1}{T}\underset{0}{\overset{T}{\int }}{u}_s(t)i_s(t)dt=\frac{A{b}_1}{2},$$

$$S=\Vert u_s\Vert \Vert i_s\Vert =\frac{A}{2}\sqrt{a_1^2+b_1^2+a_2^2},$$

$$\text{PF}=\frac{P}{S}=\frac{b_1}{\sqrt{a_1^2+b_1^2+a_2^2}}<1.$$

$$i_a(t)=\frac{P}{\Vert u_s{\Vert }^2}{u}_s(t)=b_1\sin (\omega t)$$

$$i_n(t)=i_l(t)-i_a(t)=a_1\cos (\omega t)+a_2\cos (2\omega t).$$

$$i_c(t)=C_c\frac{d}{dt}{u}_s(t)=-a_1\cos (\omega t)\Rightarrow C_c=-\frac{a_1}{\omega A},$$

$${\text{PF}}_c=\frac{b_1}{\sqrt{b_1^2+a_2^2}}<1.$$

$$i_c^{(-2)}(t)=g_c\left[u_s^{(-1)}(t)\right],$$

$${\varphi }_s(t)=u_s^{(-1)}(t)=-\frac{A}{\omega }\cos (\omega t),$$

$$q_c(t)=i_c^{(-1)}(t)=-\frac{a_1}{\omega }\sin (\omega t)-\frac{a_2}{2\omega }\sin (2\omega t).$$

$${\rho }_c=\widehat{{\rho }_c}({\varphi }_s)=-\frac{a_1}{\omega A}{\varphi }_s+\frac{a_2}{2A^2}{\varphi }_s^2+\kappa ,$$

$$\boxed{C_{M_c}({\varphi }_s)=\frac{d}{d{\varphi }_s}{\hat{\rho }}_c({\varphi }_s)=-\frac{a_1}{\omega A}+\frac{a_2}{A^2}{\varphi }_s}$$

$$i_c(t)=C_{M_c}[{\varphi }_s(t)]\frac{d}{dt}{u}_s(t)+u_s(t)\frac{d}{dt}{C}_{M_c}[{\varphi }_s(t)],$$

$${\varphi }_s(t)={\varphi }_s(0)+\underset{0}{\overset{t}{\int }}{u}_s(\tau )d\tau ,$$

$$i(t)=a_{0}+\sum_{n\in N}\big{[}a_{n}\cos(n\omega t)+b_{n}\sin(n\omega t)\big{]},$$

$$i^{(-1)}(t)=g\left[u^{(-1)}(t)\right],$$

$$G_M(\varphi )=\frac{d}{d\varphi }\hat{q}(\varphi ).$$

$$i(t)=\sum _{n\in N}{b}_n\sin (n\omega t).$$

$$q(t)=-\sum _{n\in N}\frac{b_n}{n\omega }\cos (n\omega t).$$

$$q=\hat{q}(\varphi )=-\sum _{n\in N}\frac{b_n}{n\omega }{T}_n\left(-\frac{\omega }{A}\varphi \right),$$

$$\boxed{G_M(\varphi )=\sum _{n\in N}\frac{b_n}{A}{U}_{n-1}\left(-\frac{\omega }{A}\varphi \right)}$$

$$\sigma (t)=u^{(-2)}(t)=-\frac{A}{{\omega }^2}\sin (\omega t).$$

$${\Gamma }_M(\sigma )=\frac{d}{d\sigma }\hat{q}(\sigma )$$

$$i(t)=\sum _{n\in N_{\text{odd}}}{a}_n\cos (n\omega t)+\sum _{n\in N_{\text{even}}}{b}_n\sin (n\omega t),$$

$$\boxed{\begin{array}{rl}{\Gamma }_M(\sigma )& =\frac{\omega }{A}\sum _{n\in N_{\text{odd}}}(-1{)}^{\frac{n+1}{2}}{a}_n{U}_{n-1}\left(-\frac{{\omega }^2}{A}\sigma \right)\\ & -\frac{\omega }{A}\sum _{n\in N_{\text{even}}}(-1{)}^{\frac{n+2}{2}}{b}_n{U}_{n-1}\left(-\frac{{\omega }^2}{A}\sigma \right)\end{array}}$$

Full text

I INTRODUCTION

Traditionally, the three basic building blocks to model an electrical circuit are the resistor, inductor, and capacitor. From a mathematical perspective, the behavior of each of these building blocks is described by a relationship between two of the four basic electrical variables: voltage, current, flux–linkage, and charge. A resistor is described by a relationship between voltage and current; an inductor by that of current and flux–linkage; and a capacitor by that of voltage and charge. But what about the ‘missing’ relationship between charge and flux–linkage? As pointed out in [1], a fourth element must be added to complete the symmetry. This element is called a memristor—a contraction of memory and resistance that refers to a resistor with memory.

In fact, after the introduction of the memristor concept, it was realized in [2] that by introducing higher–order voltage–current differentials and integrals, a complete universe of (conceptual) higher–order circuit elements (somewhat reminiscent of Mendeleev’s periodic table in chemistry) can be created as shown in Fig. 1. Indeed, defining

[TABLE]

and

[TABLE]

where $\alpha,\beta>0$ refers to differentiation, and $\alpha,\beta<0$ refers to the anti-derivatives (i.e., indefinite integrals),111For $\alpha,\beta=0$, there holds that $u^{(0)}(t)=u(t)$ and $i^{(0)}(t)=i(t)$. each element in Fig. 1 can be described by the constitutive relationships

[TABLE]

which are referred to as the ‘impedance’ and ‘admittance’ representation, respectively.

An element described by either one or both the relationships in (3) is generally referred to as a $(\alpha,\beta)$ element.

Obviously, the elements $(0,0)$, $(-1,0)$, and $(0,-1)$ correspond to the conventional resistor, inductor, and capacitor, respectively. The memristor is characterized by the $(-1,-1)$–element. Furthermore, as argued in [4], the elements $(-2,-1)$ and $(-1,-2)$ can be interpreted as the memory counterparts to the conventional inductor and capacitor, and are denoted as meminductor and memcapacitor, respectively.

The main contribution of this paper is the utilization of the memristor, meminductor, and memcapacitor concepts, and their conventional linear counterparts, to characterize nonlinear and/or time–varying loads. It will be shown that, apart from dc terms, virtually all loads that generate harmonic current distortion can be synthesized solely in terms of these three memory elements and their conventional linear counter parts. Consequently, the power conditioner necessary to compensate for these distortions is synthesized similarily.

In Section II, the basic concept will first be outlined using a simple nonlinear theoretical compensation example. Next, the new compensation paradigm that arises from the example will be generalized and extended to load characterization in Section III. Section IV illustrates the approach using a single–phase half–wave rectifier and a controlled bridge converter. Section V concludes the paper with some final remarks.

Notation: Throughout the document, voltages are assumed to be expressed in volt [V], currents in ampere [A], resistances in ohm [$\Omega$], inductances in henry [H], and capacitances in farad [F]. For sake of brevity, these units are omitted in the text. Furthermore, the conventional linear and time–invariant (LTI) resistor, inductor, and capacitor in the circuit diagrams are represented by their usual graphical symbols, while their nonlinear memory counterparts are visualized as in Fig. 1.

II MOTIVATING EXAMPLE

Consider an infinitely strong sinusoidal power supply that feeds a nonlinear load as shown in Fig. 2 (top–left). Let the supply voltage be

[TABLE]

while the associated load current current is given by

[TABLE]

with $a_{1}<0$ and $a_{2},b_{1}>0$.

Let us first consider the case that there is no compensation, i.e., $i_{c}(t)=0$, so that the supplied current equals $i_{s}(t)=i_{l}(t)$. The active (useful) power equals

[TABLE]

where $T=2\pi/\omega$. Furthermore, the apparent power is given by

[TABLE]

yielding a less than unity power factor

[TABLE]

In order to improve the power factor, the non–active (watt–less) current should be compensated as much as possible. This current is found by extracting the active (Fryze [5]) current

[TABLE]

from the total load current, i.e.,

[TABLE]

II-A Conventional Compensation

Now, using a conventional passive and lossless linear and time–invariant (LTI) shunt compensator, only the fundamental non–active current component can be compensated. Indeed, since ${a_{1}<0}$, the fundamental load current component for this example is dominantly inductive, a conventional LTI shunt capacitor

[TABLE]

will reduce the supplied current with $i_{s}(t)=i_{l}(t)+i_{c}(t)$, but does only increase the power factor to

[TABLE]

Interestingly, the application of a shunt memcapacitor does lead to a unity power factor, as illustrated next.

II-B Compensation with a Memcapacitor

Recall from Fig. 1, that a memcapacitor is generally characterized by the constitutive relationships in (3) for ${\alpha=-1}$ and ${\beta=-2}$. Since we are interested in generating the full compensation current $i_{c}(t)=-i_{n}(t)$, we choose the second ‘admittance’ option, i.e.,

[TABLE]

where, for ease of notation, we define $\rho_{c}(t)=i_{c}^{(-2)}(t)$ and

[TABLE]

which represent the time–integrated charge and flux–linkage, respectively.

Now, the charge to be compensated equals

[TABLE]

Hence, after some straightforward manipulations, we find the following constitutive relationship between the time–integrated charge and the flux-linkage as

[TABLE]

where $\kappa$ is a constant which depends on the initial conditions. Finally, upon differentiating with respect to the flux-linkage finally yields a flux-controlled memcapacitor of the form

[TABLE]

As will be discussed further in Section III-B, the first right–hand term of (8) represents a linear capacitor that coincides with the conventional one derived in (6), whereas the second term completes the characteristic of a memcapacitor. Furthermore, note that in terms of the current and voltage, the compensation current is now given by

[TABLE]

so that $i_{s}(t)=i_{a}(t)$ and thus that $\text{PF}_{c}=1$.

II-C Numerical Results

Fig. 3 (top–left) shows a numerical simulation for two cycles of the power conditioner and clearly demonstrates the pinched hysteresis loop in the charge–voltage plane that constitutes the fingerprint of a memcapacitor [4]. The underlying nonlinear single–valued constitutive relationship is depicted in Fig. 3 (top–right). It is important to emphasize that, although the capacitance can be evaluated as a function of time, as shown in Fig. 3 (bottom) and hence suggests to be interpreted as a time–varying capacitor, its true origin lies in its ability to bookkeep (‘memorize’) the full history of the voltage across it as

[TABLE]

where we set $\phi_{s}(0)=-A/\omega$.

The next sections will be devoted to the exploration of the three memory elements as a new paradigm for the synthesis of any periodic ac current distortion. Consequently, any nonlinear and/or time–varying load can be characterized as a combination of a memristor, meminductor, and memcapacitor, and at the same time provides a synthesis of a power conditioner that aims to improve the power factor under nonsinusoidal current distortions.

III CURRENT SYNTHESIS

Consider a device that exhibits a distorted current

[TABLE]

as a result of a purely sinusoidal supply voltage $u(t)$ of the form (4). Here ${N=N_{\text{even}}\cup N_{\text{odd}}}$ denotes the union of the set of even and odd harmonics, respectively, and $a_{0}$ represents the dc component. The two fundamental components associated to ${n=1}$ correspond to a current through an LTI circuit that is dominantly inductive if ${a_{1}<0}$, and dominantly capacitive if ${a_{1}>0}$. Hence the non–active part of this current can be compensated with a conventional capacitor or inductor equal to $-\frac{a_{1}}{\omega A}$ or $\frac{A}{\omega a_{1}}$, respectively. The components for ${n>1}$ are due to nonlinear and/or time–varying character of the device. It is shown in [10], that these terms can be categorized into memristors, meminductors, and memcapacitors.

III-A Memristor

According to Fig. 1, a memristor is generally characterized by (3) for ${\alpha=\beta=-1}$. Again, since we are interested in synthesizing the load current, the ‘admittance’ representation

[TABLE]

is selected. For ease of notation, we define the corresponding charge $q(t)=i^{(-1)}(t)$ and flux–linkage $\phi(t)=u^{(-1)}(t)$, where $u(t)$ has the form (4). Hence, the constitutive relationship (12) defines a flux–controlled memristor $q=\hat{q}(\phi)$, or, by differentiating the latter with respect to time, in terms of the current and voltage $i=G_{M}(\phi)u$, where $G_{M}(\phi)$ represents the incremental memductance (i.e., inverse memristance)

[TABLE]

As shown in [10], the harmonic components in (11) that can be generated by a memristor are given by

[TABLE]

The fundamental component (${n=1}$) corresponds to an LTI resistor equal to $\frac{A}{b_{1}}$, whereas the components for ${n>1}$, ${n\in N_{\text{odd}}}$, correspond to a nonlinear resistor. The remaining even components ${n\in N_{\text{even}}}$ are responsible for the memristor’s memory capacities, i.e., the pinched hysterises loop in the current–voltage plane.

Integrating (14) with respect to time gives

[TABLE]

It is then straightforward to express the latter as a single–valued function of the flux–linkage (recall that $\phi(t)$ is of the form (7)) as

[TABLE]

where $T_{n}(\cdot)$ are Chebyshev polynomials of the first kind [8]. Hence, the associated memductance (13) is given by

[TABLE]

where $U_{n}(\cdot)$ are Chebyshev polynomials of the second kind.

III-B Meminductor and Memcapacitor

According to Fig. 1, a meminductor is generally characterized by (3) for ${\alpha=-2}$ and ${\beta=-1}$. In terms of the ‘admittance’ representation, we obtain the constitutive relationship $q=\hat{q}(\sigma)$, where

[TABLE]

Then, the current–flux relationship equals $i=\varGamma_{M}(\sigma)\phi$, where

[TABLE]

represents the incremental inverse meminductance.

The harmonic components in (11) that can be generated by a meminductor are given by

[TABLE]

where ${a_{1}<0}$ corresponds to an LTI inductor and the remaining odd components correspond to a nonlinear one. The even components give rise to a pinched hysteresis loop in the current–flux plane.

In a similar fashion as the memristor, we find for the inverse meminductance222It should be pointed out that the index $m$ introduced in [10] of the inverse meminductance should start at $m=0$, instead of $m=1$, to provide correct results.

[TABLE]

Finally, the harmonics that can be generated by a memcapacitor (see Section II-B for further details) are given by

[TABLE]

In this case, ${a_{1}>0}$ corresponds to an LTI capacitor and the remaining odd components correspond to a nonlinear one. The even components give rise to a pinched hysteresis loop in the charge–voltage plane. The corresponding charge can be expressed as

[TABLE]

providing a flux–controlled memcapacitance

[TABLE]

III-C Voltage Synthesis

Although only voltage–driven cases are considered here, the responses of the memristor, meminductor, and memcapacitor excited by a current source can be readily be found in a similar fashion. If we apply a current

[TABLE]

to a meminductor, a voltage response containing only cosine terms will be observed. Then the expression for the associated flux–linkage is identical to the right–hand side of (22) and now gives rise to $\phi=L_{M}(q)i$, where $L_{M}(q)$ represents a charge–controlled meminductance that is the same as the right–hand side of (23)—after the roles of $\phi(t)$ and $q(t)$ are reversed.

Similarly, if a memcapacitor is excited by (24), the voltage response will be identical to the right–hand side of (19) and provides ${u=S_{M}(\rho)q}$, where the inverse memcapacitance $S_{M}(\rho)$ equals the right–hand side of (20)—after reversing the roles of $\sigma(t)$ and $\rho(t)$.

III-D Direct Current Components

As observed from the above analysis, it is important to emphasize that the memory elements are inherently ac devices. It is therefore not feasible to characterize the presence of a dc component $a_{0}$ of (11) in terms of these elements since their constitutive relationships are obtained upon time integration of the voltage and current components and therefore give rise to unbounded signals or saturation [4]. The presence of a dc component can, however, be represented by a conventional dc current source.

IV LOAD AND POWER CONDITIONER SYNTHESIS

We are now in position to sythesize any nonlinear or time–varying load that generates a current distortion of the form (11) using the three memory elements and their LTI counterparts. Indeed, using the analysis presented in the previous section, the load current (11) can be decomposed into

[TABLE]

where $u_{s}(t)$ and $\phi_{s}(t)$ are defined by (4) and (10), respectively, and $I_{\text{dc}}=a_{0}$. This means that every nonlinear and/or time–varying load that generates a current of the form (11) can be synthesised by a parallel connection of a dc current source, a memristor, a meminductor, and a memcapacitor.

Furthermore, as outlined in Section II, the power factor can be significantly improved by selecting a shunt power conditioner that injects a negative copy of the non–active current components, i.e., $i_{c}(t)=-i_{n}(t)$, with

[TABLE]

where $P$ represents the active power as defined in (5) and the exclusion of the dc current component is taken into account. Hence, the power conditioner can be synthesized in terms of

[TABLE]

In this section, the load current and the associated power conditioner synthesis will be applied to characterize a single–phase half–wave rectifier and a fully controlled bridge converter.

IV-A Half–Wave Rectifier

Consider the half–wave rectifier of Fig. 4 (top–left). Since the rectifier is feeding a unity resistance, it is well–known (see e.g., [6]) that the load current $i_{l}(t)$ is of the form (11), with

[TABLE]

for $n\in N_{\text{even}}=\{2,4,6,\ldots\infty\}$.

IV-A1 Load Synthesis

In order to synthesize this load current in terms of the memory elements and their conventional LTI counterparts, we proceed as follows. First, we note the presence of a dc component. This will be represented by a dc current source $I_{\text{dc}}=A/\pi$. Secondly, the fundamental current is in–phase with the supplied voltage and can therefore be represented by a shunt resistor of $R_{l}=2$. The third part exhibits the load generated harmonics that all have negative coefficients. Although these harmonics fit the harmonic spectrum that is characterized by (21), with $N=N_{\text{even}}$, the associated memcapacitor will not exhibit a single–valued constitutive relationship since the linear term is missing for $n\geq 2$.

This problem can be circumvented by selecting a shunt memcapacitor of the form

[TABLE]

where $\gamma$ can be any positive constant, and add a shunt inductor equals to $L_{l}=\frac{A}{\omega\gamma}$ in order to compensate for the additionally introduced linear capacitance. The associated equivalent circuit diagram is depicted in Fig. 4 (top–right).

It should be noted that since $N_{\text{even}}$ contains an infinite set of even harmonics, it is impossible to explicitly specify (26) precisely. However, as the higher–order coefficients decrease rather rapidly with the harmonic–order, the memcapacitor can be set to any feasible desired accuracy using a finite number of terms.

IV-A2 Power Conditioner Synthesis

The power factor of the half–wave rectifier is determined by

[TABLE]

In order to improve the latter, all non–active currents associated to $a_{n}$ should be compensated, i.e.,

[TABLE]

This is readily accomplished by placing a shunt memcapacitor of the form

[TABLE]

and a conventional shunt inductor $L_{c}=\frac{A}{\omega\epsilon}$, with $\epsilon>0$.

Consequently, the power factor is significantly improved to

[TABLE]

The compensated circuit is depicted in Fig. 4 (bottom).

IV-B Fully Controlled Bridge Converter

Fig. 5 (top–left) shows a fully controlled single phase bridge circuit with a (large) dc reactor and resistive load. The firing delay is represented by $\delta\in[0,\pi]$. In this case, the load current is again of the form (11), but now with $a_{0}=0$,

[TABLE]

for $n\in N_{\text{odd}}=\{1,3,5,\ldots,\infty\}$; see e.g., [3].

IV-B1 Load Synthesis

Since $a_{1}\leq 0$ for all $\delta\in[0,\pi]$, the fundamental behavior of the converter is dominantly inductive. Hence, all the odd cosine terms can be represented by a meminductor, which due to the absence of even sine terms, reduces to a nonlinear inductor of the form

[TABLE]

Furthermore, although the in-phase fundamental component can be characterized by a shunt resistor $R_{l}=\frac{A}{b_{1}}$, we choose to include it in the memristor that characterizes the remaining odd sine terms by a memductance

[TABLE]

where we again note that, due to the absence of even harmonics, the latter is actually constituting a nonlinear conductor. The equivalent circuit diagram is depicted in Fig. 4 (bottom).

IV-B2 Power Conditioner Synthesis

It is shown in [3] that the uncompensated power factor equals

[TABLE]

In order to render the latter to unity, all non–active currents should be compensated. This means that

[TABLE]

for which the cosine terms are compensated by placing a shunt memcapacitor of the form

[TABLE]

which, due to the absence of even harmonics, just constitutes a nonlinear capacitor that compensates for $\varGamma_{M_{l}}(\sigma_{s})$. Note that the sine terms cannot be compensated by a meminductor as $N=N_{\text{odd}}$. However, placing a memristor of the form

[TABLE]

which, due to the absence of even harmonics, just constitutes a nonlinear resistor that compensates for $G_{M_{l}}(\sigma_{s})$. Although the constitutive relationship of this resistor is confined in all four quadrants of the current–voltage plane, it is easily shown that it is lossless since

[TABLE]

The compensated circuit is shown in Fig. 5 (bottom). Again, from a computational perspective, the higher–order elements can be set to any feasible desired accuracy by selecting a finite set of dominant terms from $N_{\text{odd}}$.

V Concluding Remarks

It is revealed that memristance, memcapacitance, and meminductance can be used to characterize virtually all nonlinear and/or time–varying loads that generate harmonic current distortion. At the same time, the memory elements can be used to synthesize the associated lossless power conditioner that compensates for these current distortions and henceforth improves the power factor, or renders it to unity.

Additionally, the load characterization in terms of the three memory elements sheds some new light on the ambiguous apparent power resolution problem exposed in e.g., [5]. Indeed, although the memory elements exhibit much richer behavior than their conventional LTI counterparts, their essential characteristics and units are still purely resistive, inductive, and capacitive. This means that meminductors and memcapacitors are able to store (and release) magnetic and electric energy [7], respectively, and therefore it makes sense to attribute their associated non–active part of the apparent power to reactive power.

Future research will be devoted to the load characterization and power conditioner synthesis subject to voltage distortions, i.e., the supply voltages of the form

[TABLE]

and to the synthesis of lossless compensation networks for LTI loads operating under such voltage distortions. The usefulness of higher–order elements beyond the three memory elements, i.e., $(\alpha,\beta)$–elements with ${\alpha,\beta>2}$, or their non–integer generalizations introduced in [9], also deserves attention.

Acknowledgment

This research is sponsored by NWO under project number: HBOPD.2018.02.028.