Two-Dimensional Spintronic Circuit Architectures on Large Scale Graphene

TL;DR

This paper demonstrates room-temperature spin current propagation in large-scale 2D graphene circuits with complex geometries, enabling potential for integrated spintronic computing devices.

Contribution

It introduces practical 2D spintronic circuit architectures on wafer-scale graphene, showing effective spin communication and control in complex geometries at room temperature.

Findings

Spin current propagates up to 34 μm in wafer-scale graphene.

Effective spin communication between magnetic memory elements in 2D circuits.

Control over Hanle spin precession signals through geometrical design.

Abstract

Solid-state electronics based on utilizing the electron spin degree of freedom for storing and processing information can pave the way for next-generation spin-based computing. However, the realization of spin communication between multiple devices in complex spin circuit geometries, essential for practical applications, is still lacking. Here, we demonstrate the spin current propagation in two-dimensional (2D) circuit architectures consisting of multiple devices and configurations using a large area CVD graphene on SiO2/Si substrate at room temperature. Taking advantage of the significant spin transport distance reaching 34 {\mu}m in commercially available wafer-scale graphene grown on Cu foil, we demonstrate that the spin current can be effectively communicated between the magnetic memory elements in graphene channels within 2D circuits of Y-junction and Hexa-arm architectures. We further show that by designing graphene channels and ferromagnetic elements at different geometrical angles, the symmetric and antisymmetric components of the Hanle spin precession signal can be remarkably controlled. These findings lay the foundation for the design of complex 2D spintronic circuits, which can be integrated into efficient electronics based on the transport of pure spin currents.