2-bit Model Compression of Deep Convolutional Neural Network on ASIC Engine for Image Retrieval

TL;DR

This paper demonstrates that 2-bit quantized CNNs can effectively be used for image retrieval on ASIC hardware, significantly reducing storage needs while maintaining performance, and introduces RNIP for large-scale image retrieval.

Contribution

It introduces a 2-bit model compression technique for CNNs on ASIC chips and proposes RNIP for large-scale image retrieval, enabling efficient hardware implementation.

Findings

2-bit CNN features achieve similar accuracy to floating-point models.

The proposed method enables large-scale image retrieval on ASIC with limited buffer size.

RNIP improves retrieval performance for large images.

Abstract

Image retrieval utilizes image descriptors to retrieve the most similar images to a given query image. Convolutional neural network (CNN) is becoming the dominant approach to extract image descriptors for image retrieval. For low-power hardware implementation of image retrieval, the drawback of CNN-based feature descriptor is that it requires hundreds of megabytes of storage. To address this problem, this paper applies deep model quantization and compression to CNN in ASIC chip for image retrieval. It is demonstrated that the CNN-based features descriptor can be extracted using as few as 2-bit weights quantization to deliver a similar performance as floating-point model for image retrieval. In addition, to implement CNN in ASIC, especially for large scale images, the limited buffer size of chips should be considered. To retrieve large scale images, we propose an improved pooling strategy, region nested invariance pooling (RNIP), which uses cropped sub-images for CNN. Testing results on chip show that integrating RNIP with the proposed 2-bit CNN model compression approach is capable of retrieving large scale images.