A fully-digital semi-rotational frequency detection algorithm for bang-bang CDRs

TL;DR

This paper introduces a fully digital semi-rotational frequency detection algorithm for bang-bang CDRs that enables reference-less, high-speed data recovery with online VCO calibration, implemented in a 65nm CMOS transceiver.

Contribution

It proposes a novel SRFD algorithm for bang-bang CDRs that simplifies implementation and improves frequency acquisition without external references.

Findings

Successfully recovers input phase at 10 Gbps

Implemented in a 65nm CMOS process

Enables online VCO calibration for temperature and voltage variations

Abstract

This work presents a new frequency acquisition method using semi-rotational frequency detection (SRFD) algorithm for a reference-less clock and data recovery (CDR) in a serial-link receiver. The proposed SRFD algorithm classifies the bang-bang phase detector(BBPD) outputs to estimate the current phase state, and detects the frequency mismatch between the input data and the sampling clock. The VCO-track path in a digital loop filter (DLF) enables online calibration of a drifted frequency of VCO caused by temperature or voltage variation after a frequency acquisition. The proposed algorithm can be implemented as a digitally-synthesized circuit, lowering design efforts for referenceless CDRs. A 10 Gbps transceiver IC with the proposed algorithm, fabricated in a 65nm CMOS process, demonstrates successful recovery of the input phase without any reference clock.