# Analog Weights in ReRAM DNN Accelerators

**Authors:** Jason K. Eshraghian, Sung-Mo Kang, Seungbum Baek, Garrick Orchard,, Herbert Ho-Ching Iu, Wen Lei

arXiv: 1904.12008 · 2019-08-14

## TL;DR

This paper introduces a novel frequency-dependent scheme for ReRAM-based DNN accelerators that alleviates single-bit storage limitations, significantly reducing power and area consumption while maintaining accuracy.

## Contribution

It proposes a new method exploiting frequency dependence of ReRAM hysteresis to encode kernel information beyond single-bit storage, improving efficiency.

## Key findings

- Reduces average power consumption by up to 16x for a single crossbar convolution.
- Reduces area by a factor of 8 without sacrificing accuracy.
- Maintains neural network accuracy comparable to non-binarized methods.

## Abstract

Artificial neural networks have become ubiquitous in modern life, which has triggered the emergence of a new class of application specific integrated circuits for their acceleration. ReRAM-based accelerators have gained significant traction due to their ability to leverage in-memory computations. In a crossbar structure, they can perform multiply-and-accumulate operations more efficiently than standard CMOS logic. By virtue of being resistive switches, ReRAM switches can only reliably store one of two states. This is a severe limitation on the range of values in a computational kernel. This paper presents a novel scheme in alleviating the single-bit-per-device restriction by exploiting frequency dependence of v-i plane hysteresis, and assigning kernel information not only to the device conductance but also partially distributing it to the frequency of a time-varying input. We show this approach reduces average power consumption for a single crossbar convolution by up to a factor of x16 for an unsigned 8-bit input image, where each convolutional process consumes a worst-case of 1.1mW, and reduces area by a factor of x8, without reducing accuracy to the level of binarized neural networks. This presents a massive saving in computing cost when there are many simultaneous in-situ multiply-and-accumulate processes occurring across different crossbars.

## Full text

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## Figures

4 figures with captions in the complete paper: https://tomesphere.com/paper/1904.12008/full.md

## References

18 references — full list in the complete paper: https://tomesphere.com/paper/1904.12008/full.md

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Source: https://tomesphere.com/paper/1904.12008