# IRC: Cross-layer design exploration of Intermittent Robust Computation   units for IoTs

**Authors:** Arman Roohi, and Ronald F DeMara

arXiv: 1904.10564 · 2019-04-25

## TL;DR

This paper introduces a novel cross-layer design for Intermittent Robust Computation units using spin-based devices, enabling energy-efficient, battery-free IoT devices by leveraging non-volatile logic and clustering techniques.

## Contribution

It proposes the IRC unit architecture, extending SHE-MTJ devices, and develops logic-embedded flip-flops and clustering synthesis for energy-efficient IoT computing.

## Key findings

- Validated with benchmark circuits showing reduced power and area.
- Demonstrated functionality and efficiency through simulations.
- Achieved middleware-coherent intermittent computation without checkpointing.

## Abstract

Energy-harvesting-powered computing offers intriguing and vast opportunities to dramatically transform the landscape of the Internet of Things (IoT) devices by utilizing ambient sources of energy to achieve battery-free computing. In order to operate within the restricted energy capacity and intermittency profile, it is proposed to innovate Intermittent Robust Computation (IRC) Unit as a new duty-cycle-variable computing approach leveraging the non-volatility inherent in spin-based switching devices. The foundations of IRC will be advanced from the device-level upwards, by extending a Spin Hall Effect Magnetic Tunnel Junction (SHE-MTJ) device. The device will then be used to realize SHE-MTJ Majority/Polymorphic Gate (MG/PG) logic approaches and libraries. Then a Logic-Embedded Flip-Flop (LE-FF) is developed to realize rudimentary Boolean logic functions along with an inherent state-holding capability within a compact footprint. Finally, the NV-Clustering synthesis procedure and corresponding tool module are proposed to instantiate the LE-FF library cells within conventional Register Transfer Language (RTL) specifications. This selectively clusters together logic and NV state-holding functionality, based on energy and area minimization criteria. It also realizes middleware-coherent, intermittent computation without checkpointing, micro-tasking, or software bloat and energy overheads vital to IoT. Simulation results for various benchmark circuits including ISCAS-89 validate functionality and power dissipation, area, and delay benefits.

## Full text

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## Figures

7 figures with captions in the complete paper: https://tomesphere.com/paper/1904.10564/full.md

## References

21 references — full list in the complete paper: https://tomesphere.com/paper/1904.10564/full.md

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Source: https://tomesphere.com/paper/1904.10564