A Parallel Bitstream Generator for Stochastic Computing
Yawen Zhang, Runsheng Wang, Xinyue Zhang, Zherui Zhang, Jiahao Song,, Zuodong Zhang, Yuan Wang, and Ru Huang

TL;DR
This paper introduces a parallel bitstream generator for stochastic computing that significantly reduces hardware area and energy consumption, enhancing the practicality of SC in neural networks and image processing.
Contribution
A novel parallel bitstream generator design that operates with a single clock, drastically reducing hardware area and energy use compared to traditional methods.
Findings
2.5x reduction in hardware area
712x decrease in energy consumption
Effective for neural networks and image processing applications
Abstract
Stochastic computing (SC) presents high error tolerance and low hardware cost, and has great potential in applications such as neural networks and image processing. However, the bitstream generator, which converts a binary number to bitstreams, occupies a large area and energy consumption, thus weakening the superiority of SC. In this paper, we propose a novel technique for generating bitstreams in parallel, which needs only one clock for conversion and significantly reduces the hardware cost. Synthesis results demonstrate that the proposed parallel bitstream generator improves 2.5x area and 712x energy consumption.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsError Correcting Code Techniques · Stochastic Gradient Optimization Techniques · Quantum Computing Algorithms and Architecture
