# Physical insights into the operation of a 1-nm gate length transistor based on MoS2 with metallic carbon nanotube gate

## TL;DR

This study uses quantum transport simulations to analyze the performance limits of 1-nm gate length MoS2 transistors with CNT gates, revealing fundamental challenges in device control and efficiency at atomic scales.

## Contribution

It provides the first detailed quantum simulation analysis of 1-nm gate length MoS2 transistors with CNT gates, highlighting key physical limitations and design considerations.

## Key findings

- Sub-threshold swing exceeds ideal thermionic limit due to tunneling and gate-drain interactions.
- Finite CNT density of states reduces device performance.
- Limited capacitive coupling of CNT gates constrains transistor operation.

## Abstract

Low-dimensional materials such as layered semiconductors or carbon nanotubes (CNTs) have been attracting increasing attention in the last decades due to their inherent scaling properties, which become fundamental to sustain the scaling in electronic devices. Inspired by recent experimental results (S.B. Desai, S.R. Madhvapathy, A.B. Sachid, J.P. Llinas, Q. Wang, G.H. Ahn, G. Pitner, M.J. Kim, J. Bokor, C. Hu, H.-S. P. Wong, and A. Javey, Science 354, 99 (2016)), in this work we examined the ultimate performance of of MoS$_2$-channel Field Effect Transistors with 1-nm gate length by means of quantum transport simulations based on Poisson equation and Non-equilibrium Green's function formalism. We considered uniformly scaled devices, with channel lengths ranging from 5 to 20 nm controlled by a cylindrical gate with a 1-nm diameter, as would be required in realistic integrated circuits. Moreover, we also evaluated the effect of the finite density of states of a carbon nanotube gate on the loss of device performance. We noticed that the sub-threshold swing for all short-channel structures was greater than the ideal limit of thermionic devices and we attributed this to the presence of tunneling currents and gate-drain interactions. We tailored the transistor architecture in order to improve the gate control. We concluded that the limited CNT-channel capacitive coupling poses severe limitations on the operation and thus exploitation of the device.