# Energy Saving Strategy Based on Profiling

**Authors:** Milan Yadav, Kanak Khanna

arXiv: 1904.07813 · 2019-04-17

## TL;DR

This paper proposes a timeslice-based energy saving strategy using DVFS to reduce processor power consumption while maintaining performance, achieving up to 7% energy savings on NAS benchmarks.

## Contribution

It introduces a novel approach to applying DVFS periodically based on performance constraints, balancing energy efficiency and application performance.

## Key findings

- Achieved up to 7% energy savings on NAS benchmarks
- Demonstrated effectiveness of timeslice-based DVFS strategy
- Maintained application performance within user-defined constraints

## Abstract

Constraints imposed by power consumption and the related costs are one of the key roadblocks to the design and development of next generation exascale systems. To mitigate these issues, strategies that reduce the power consumption of the processor are the need of the hour. Techniques such as Dynamic Voltage and Frequency Scaling (DVFS) exist which reduce the power consumption of a processor at runtime but they should be used in such a manner so that their overhead does not hamper application performance. In this paper, we propose an energy saving strategy which operates on timeslice basis to apply DVFS under a user defined performance constraint. Results show energy savings up to 7% when NAS benchmarks are tested on a laptop platform

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Source: https://tomesphere.com/paper/1904.07813