# Parallel Algorithms Development for Programmable Devices with Application from Cryptography

## TL;DR

This paper presents a formal methodology for designing parallel cryptographic algorithms on FPGAs, demonstrating its application through multiple implementations of the Serpent cipher with performance evaluations.

## Contribution

It introduces a formal, functional programming-based approach for parallel hardware design, specifically applied to cryptography on reconfigurable devices.

## Key findings

- Multiple parallel Serpent implementations with varied performance.
- Effective use of CSP-inspired refinements for hardware synthesis.
- Successful deployment on a 2-million-gate FPGA platform.

## Abstract

Reconfigurable devices, such as Field Programmable Gate Arrays (FPGAs), have been witnessing a considerable increase in density. State-of-the-art FPGAs are complex hybrid devices that contain up to several millions of gates. Recently, research effort has been going into higher-level parallelization and hardware synthesis methodologies that can exploit such a programmable technology. In this paper, we explore the effectiveness of one such formal methodology in the design of parallel versions of the Serpent cryptographic algorithm. The suggested methodology adopts a functional programming notation for specifying algorithms and for reasoning about them. The specifications are realized through the use of a combination of function decomposition strategies, data refinement techniques, and off-the-shelf refinements based upon higher-order functions. The refinements are inspired by the operators of Communicating Sequential Processes (CSP) and map easily to programs in Handel-C (a hardware description language). In the presented research, we obtain several parallel Serpent implementations with different performance characteristics. The developed designs are tested under Celoxica's RC-1000 reconfigurable computer with its 2 million gates Virtex-E FPGA. Performance analysis and evaluation of these implementations are included.