A Logic Simplification Approach for Very Large Scale Crosstalk Circuit Designs
Md Arif Iqbal, Naveen Kumar Macha, Bhavana Tejaswini Repalle,, Mostafizur Rahman

TL;DR
This paper presents a novel logic simplification method for large-scale crosstalk circuit design, enabling significant density and power benefits by integrating crosstalk-specific synthesis steps into existing EDA flows.
Contribution
It introduces a new circuit style and a logic simplification approach tailored for crosstalk circuits, enhancing synthesis and layout automation for nanoscale interconnects.
Findings
Over 5x density improvement over CMOS at 16nm
2x power reduction compared to CMOS designs
36% density improvement over majority synthesis on benchmarks
Abstract
Crosstalk computing, involving engineered interference between nanoscale metal lines, offers a fresh perspective to scaling through co-existence with CMOS. Through capacitive manipulations and innovative circuit style, not only primitive gates can be implemented, but custom logic cells such as an Adder, Subtractor can be implemented with huge gains. Our simulations show over 5x density and 2x power benefits over CMOS custom designs at 16nm [1]. This paper introduces the Crosstalk circuit style and a key method for large-scale circuit synthesis utilizing existing EDA tool flow. We propose to manipulate the CMOS synthesis flow by adding two extra steps: conversion of the gate-level netlist to Crosstalk implementation friendly netlist through logic simplification and Crosstalk gate mapping, and the inclusion of custom cell libraries for automated placement and layout. Our logic…
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